[Mesa-dev] [PATCH] radv: compact varyings after removing unused ones
Samuel Pitoiset
samuel.pitoiset at gmail.com
Thu Feb 15 11:15:15 UTC 2018
On 02/14/2018 11:24 PM, Timothy Arceri wrote:
> On 15/02/18 01:10, Samuel Pitoiset wrote:
>> It makes no sense to compact before, and the description of
>> nir_compact_varyings() confirms that.
>
> Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
>
> Your right this seems to be in the wrong place. There was a lot of
> restructuring around the time this landed so it seems to have been moved
> to the wrong location at some point. The original commit message (below)
> records a performance improvement it might be good to check if this
> improves things further.
>
> SaschaWillems Vulkan demo tessellation:
>
> ~4000fps -> ~4600fps
Mmmh, with this patch 5800->5200 fps on vega, I will have a look.
>
>
>
>>
>> Polaris10:
>> Totals from affected shaders:
>> SGPRS: 106000 -> 105600 (-0.38 %)
>> VGPRS: 70704 -> 70640 (-0.09 %)
>> Spilled SGPRs: 892 -> 878 (-1.57 %)
>> Code Size: 2826240 -> 2812476 (-0.49 %) bytes
>> Max Waves: 15909 -> 15899 (-0.06 %)
>>
>> Vega10:
>> Totals from affected shaders:
>> SGPRS: 103520 -> 103664 (0.14 %)
>> VGPRS: 70776 -> 70808 (0.05 %)
>> Spilled SGPRs: 740 -> 722 (-2.43 %)
>> Code Size: 2786076 -> 2772004 (-0.51 %) bytes
>> Max Waves: 18026 -> 18010 (-0.09 %)
>>
>> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
>> ---
>> src/amd/vulkan/radv_pipeline.c | 9 +++------
>> 1 file changed, 3 insertions(+), 6 deletions(-)
>>
>> diff --git a/src/amd/vulkan/radv_pipeline.c
>> b/src/amd/vulkan/radv_pipeline.c
>> index 8f872e7c14..06e1ec5ae3 100644
>> --- a/src/amd/vulkan/radv_pipeline.c
>> +++ b/src/amd/vulkan/radv_pipeline.c
>> @@ -1525,6 +1525,9 @@ radv_link_shaders(struct radv_pipeline
>> *pipeline, nir_shader **shaders)
>> ordered_shaders[i - 1]);
>> if (progress) {
>> + nir_compact_varyings(ordered_shaders[i],
>> + ordered_shaders[i - 1], true);
>> +
>> nir_lower_global_vars_to_local(ordered_shaders[i]);
>> radv_optimize_nir(ordered_shaders[i]);
>> nir_lower_global_vars_to_local(ordered_shaders[i - 1]);
>> @@ -1715,7 +1718,6 @@ void radv_create_shaders(struct radv_pipeline
>> *pipeline,
>> last = i;
>> }
>> - int prev = -1;
>> for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) {
>> const VkPipelineShaderStageCreateInfo *stage = pStages[i];
>> @@ -1746,11 +1748,6 @@ void radv_create_shaders(struct radv_pipeline
>> *pipeline,
>> nir_lower_io_to_scalar_early(nir[i], mask);
>> radv_optimize_nir(nir[i]);
>> }
>> -
>> - if (prev != -1) {
>> - nir_compact_varyings(nir[prev], nir[i], true);
>> - }
>> - prev = i;
>> }
>> if (nir[MESA_SHADER_TESS_CTRL]) {
>>
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