[Mesa-dev] [PATCH 04/13] radeonsi: change si_descriptors::shader_userdata_offset type to short

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

We will want to use SH registers outside of user data SGPRs, like the GFX9
special SGPRs.
---
 src/gallium/drivers/radeonsi/si_descriptors.c | 12 ++++++------
 src/gallium/drivers/radeonsi/si_state.h       |  6 +++---
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 2c1c4b7..0bad3e1 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -108,28 +108,28 @@ static void si_init_descriptor_list(uint32_t *desc_list,
 
 	/* Initialize the array to NULL descriptors if the element size is 8. */
 	if (null_descriptor) {
 		assert(element_dw_size % 8 == 0);
 		for (i = 0; i < num_elements * element_dw_size / 8; i++)
 			memcpy(desc_list + i * 8, null_descriptor, 8 * 4);
 	}
 }
 
 static void si_init_descriptors(struct si_descriptors *desc,
-				unsigned shader_userdata_index,
+				short shader_userdata_rel_index,
 				unsigned element_dw_size,
 				unsigned num_elements)
 {
 	desc->list = CALLOC(num_elements, element_dw_size * 4);
 	desc->element_dw_size = element_dw_size;
 	desc->num_elements = num_elements;
-	desc->shader_userdata_offset = shader_userdata_index * 4;
+	desc->shader_userdata_offset = shader_userdata_rel_index * 4;
 	desc->slot_index_to_bind_directly = -1;
 }
 
 static void si_release_descriptors(struct si_descriptors *desc)
 {
 	r600_resource_reference(&desc->buffer, NULL);
 	FREE(desc->list);
 }
 
 static bool si_upload_descriptors(struct si_context *sctx,
@@ -970,33 +970,33 @@ static void si_bind_sampler_states(struct pipe_context *ctx,
 
 		sctx->descriptors_dirty |= 1u << si_sampler_and_image_descriptors_idx(shader);
 	}
 }
 
 /* BUFFER RESOURCES */
 
 static void si_init_buffer_resources(struct si_buffer_resources *buffers,
 				     struct si_descriptors *descs,
 				     unsigned num_buffers,
-				     unsigned shader_userdata_index,
+				     short shader_userdata_rel_index,
 				     enum radeon_bo_usage shader_usage,
 				     enum radeon_bo_usage shader_usage_constbuf,
 				     enum radeon_bo_priority priority,
 				     enum radeon_bo_priority priority_constbuf)
 {
 	buffers->shader_usage = shader_usage;
 	buffers->shader_usage_constbuf = shader_usage_constbuf;
 	buffers->priority = priority;
 	buffers->priority_constbuf = priority_constbuf;
 	buffers->buffers = CALLOC(num_buffers, sizeof(struct pipe_resource*));
 
-	si_init_descriptors(descs, shader_userdata_index, 4, num_buffers);
+	si_init_descriptors(descs, shader_userdata_rel_index, 4, num_buffers);
 }
 
 static void si_release_buffer_resources(struct si_buffer_resources *buffers,
 					struct si_descriptors *descs)
 {
 	int i;
 
 	for (i = 0; i < descs->num_elements; i++) {
 		pipe_resource_reference(&buffers->buffers[i], NULL);
 	}
@@ -2186,26 +2186,26 @@ void si_emit_compute_shader_pointers(struct si_context *sctx)
 	if (sctx->compute_bindless_pointer_dirty) {
 		si_emit_shader_pointer(sctx, &sctx->bindless_descriptors, base);
 		sctx->compute_bindless_pointer_dirty = false;
 	}
 }
 
 /* BINDLESS */
 
 static void si_init_bindless_descriptors(struct si_context *sctx,
 					 struct si_descriptors *desc,
-					 unsigned shader_userdata_index,
+					 short shader_userdata_rel_index,
 					 unsigned num_elements)
 {
 	MAYBE_UNUSED unsigned desc_slot;
 
-	si_init_descriptors(desc, shader_userdata_index, 16, num_elements);
+	si_init_descriptors(desc, shader_userdata_rel_index, 16, num_elements);
 	sctx->bindless_descriptors.num_active_slots = num_elements;
 
 	/* The first bindless descriptor is stored at slot 1, because 0 is not
 	 * considered to be a valid handle.
 	 */
 	sctx->num_bindless_descriptors = 1;
 
 	/* Track which bindless slots are used (or not). */
 	util_idalloc_init(&sctx->bindless_used_slots);
 	util_idalloc_resize(&sctx->bindless_used_slots, num_elements);
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index ea5038d..8d2b934 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -268,23 +268,23 @@ struct si_descriptors {
 
 	/* The maximum number of descriptors. */
 	uint32_t num_elements;
 
 	/* Slots that are used by currently-bound shaders.
 	 * It determines which slots are uploaded.
 	 */
 	uint32_t first_active_slot;
 	uint32_t num_active_slots;
 
-	/* The SGPR index where the 64-bit pointer to the descriptor array will
-	 * be stored. */
-	ubyte shader_userdata_offset;
+	/* The SH register offset relative to USER_DATA*_0 where the pointer
+	 * to the descriptor array will be stored. */
+	short shader_userdata_offset;
 	/* The size of one descriptor. */
 	ubyte element_dw_size;
 	/* If there is only one slot enabled, bind it directly instead of
 	 * uploading descriptors. -1 if disabled. */
 	signed char slot_index_to_bind_directly;
 };
 
 struct si_buffer_resources {
 	struct pipe_resource		**buffers; /* this has num_buffers elements */
 
-- 
2.7.4