[Mesa-dev] [PATCH 07/17] intel/compiler/fs: Return multiple_instructions_emitted from generate_linterp

[Matt Turner]

If multiple instructions are emitted, special handling of things like
conditional mod, saturate, and NoDDClr/NoDDChk need to be performed.

I noticed that conditional mods were misapplied when adding support for
Gen11 (in the previous patch). The next patch fixes the same bug in the
Gen4 LINE/MAC case, though I was not able to trigger it.
---
 src/intel/compiler/brw_fs.h             |  2 +-
 src/intel/compiler/brw_fs_generator.cpp | 12 +++++++++---
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index 63373580ee4..37106ccb284 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -409,7 +409,7 @@ private:
    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
    void generate_barrier(fs_inst *inst, struct brw_reg src);
-   void generate_linterp(fs_inst *inst, struct brw_reg dst,
+   bool generate_linterp(fs_inst *inst, struct brw_reg dst,
 			 struct brw_reg *src);
    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
                      struct brw_reg surface_index,
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 54869bc3ebc..0854709b272 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -646,9 +646,9 @@ fs_generator::generate_barrier(fs_inst *inst, struct brw_reg src)
    brw_WAIT(p);
 }
 
-void
+bool
 fs_generator::generate_linterp(fs_inst *inst,
-			     struct brw_reg dst, struct brw_reg *src)
+                               struct brw_reg dst, struct brw_reg *src)
 {
    /* PLN reads:
     *                      /   in SIMD16   \
@@ -719,12 +719,18 @@ fs_generator::generate_linterp(fs_inst *inst,
          brw_inst_set_saturate(p->devinfo, i[0], false);
          brw_inst_set_saturate(p->devinfo, i[2], false);
       }
+
+      return true;
    } else if (devinfo->has_pln &&
               (devinfo->gen >= 7 || (delta_x.nr & 1) == 0)) {
       brw_PLN(p, dst, interp, delta_x);
+
+      return false;
    } else {
       brw_LINE(p, brw_null_reg(), interp, delta_x);
       brw_MAC(p, dst, suboffset(interp, 1), delta_y);
+
+      return true;
    }
 }
 
@@ -1999,7 +2005,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
 	 brw_MOV(p, dst, src[0]);
 	 break;
       case FS_OPCODE_LINTERP:
-	 generate_linterp(inst, dst, src);
+	 multiple_instructions_emitted = generate_linterp(inst, dst, src);
 	 break;
       case FS_OPCODE_PIXEL_X:
          assert(src[0].type == BRW_REGISTER_TYPE_UW);
-- 
2.16.1