[Mesa-dev] [PATCH] radeonsi/nir: enable lowering of fpow

[Marek Olšák]

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Fri, Feb 23, 2018 at 7:04 AM, Timothy Arceri <tarceri at itsqueeze.com> wrote:
> Lowering fpow in NIR rather than LLVM can be beneficial.
>
> Polaris results:
>
> Totals from affected shaders:
> SGPRS: 124928 -> 124896 (-0.03 %)
> VGPRS: 68616 -> 68332 (-0.41 %)
> Spilled SGPRs: 394 -> 413 (4.82 %)
> Spilled VGPRs: 0 -> 0 (0.00 %)
> Private memory VGPRs: 0 -> 0 (0.00 %)
> Scratch size: 0 -> 0 (0.00 %) dwords per thread
> Code Size: 3668912 -> 3658368 (-0.29 %) bytes
> LDS: 0 -> 0 (0.00 %) blocks
> Max Waves: 18575 -> 18593 (0.10 %)
> Wait states: 0 -> 0 (0.00 %)
>
> Fixes: d6b753920677 "ac/nir: remove emission of nir_op_fpow"
>
> Cc: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/gallium/drivers/radeonsi/si_get.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
> index 18d9cec414..6e799534b2 100644
> --- a/src/gallium/drivers/radeonsi/si_get.c
> +++ b/src/gallium/drivers/radeonsi/si_get.c
> @@ -492,6 +492,7 @@ static const struct nir_shader_compiler_options nir_options = {
>         .lower_scmp = true,
>         .lower_flrp32 = true,
>         .lower_flrp64 = true,
> +       .lower_fpow = true,
>         .lower_fsat = true,
>         .lower_fdiv = true,
>         .lower_sub = true,
> --
> 2.14.3
>
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