[Mesa-dev] [PATCH 2/2] radeonsi/nir: fix loading of doubles for tess varyings

[Marek Olšák]

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Fri, Feb 23, 2018 at 2:06 AM, Timothy Arceri <tarceri at itsqueeze.com> wrote:
> ---
>  src/gallium/drivers/radeonsi/si_shader.c | 12 ++++++++++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index 2e398f6335..49db4d6367 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -1273,7 +1273,11 @@ static LLVMValueRef si_nir_load_tcs_varyings(struct ac_shader_abi *abi,
>
>         LLVMValueRef value[4];
>         for (unsigned i = 0; i < num_components + component; i++) {
> -               value[i] = lds_load(bld_base, type, i, dw_addr);
> +               unsigned offset = i;
> +               if (llvm_type_is_64bit(ctx, type))
> +                       offset *= 2;
> +
> +               value[i] = lds_load(bld_base, type, offset, dw_addr);
>         }
>
>         return ac_build_varying_gather_values(&ctx->ac, value, num_components, component);
> @@ -1360,7 +1364,11 @@ LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
>          */
>         LLVMValueRef value[4];
>         for (unsigned i = component; i < num_components + component; i++) {
> -               value[i] = buffer_load(&ctx->bld_base, type, i, buffer, base, addr, true);
> +               unsigned offset = i;
> +               if (llvm_type_is_64bit(ctx, type))
> +                       offset *= 2;
> +
> +               value[i] = buffer_load(&ctx->bld_base, type, offset, buffer, base, addr, true);
>         }
>
>         return ac_build_varying_gather_values(&ctx->ac, value, num_components, component);
> --
> 2.14.3
>
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