[Mesa-dev] [PATCH v3 4/7] i965: prevent using auxilary buffers when an astc5x5 texture is present

[kevin.rogovin at intel.com]

From: Kevin Rogovin <kevin.rogovin at intel.com>

Signed-off-by: Kevin Rogovin <kevin.rogovin at intel.com>
---
 src/mesa/drivers/dri/i965/brw_draw.c             | 20 ++++++++++++++++++--
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c |  7 +++++--
 2 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 0241035..34f4de3 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -392,6 +392,8 @@ mark_textures_used_for_txf(BITSET_WORD *used_for_txf,
  *
  * Resolve the depth buffer's HiZ buffer, resolve the depth buffer of each
  * enabled depth texture, and flush the render cache for any dirty textures.
+ * In addition, if the ASTC5x5 workaround is needed and if ASTC5x5 textures
+ * are present, resolve textures so that auxilary buffers are not needed.
  */
 void
 brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering,
@@ -445,10 +447,14 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering,
                                      "for sampling");
       }
 
+      const bool astc_disables_aux = (brw->astc5x5_wa.required &&
+         brw->astc5x5_wa.texture_astc5x5_present &&
+         tex_obj->mt->aux_usage != ISL_AUX_USAGE_NONE);
+
       intel_miptree_prepare_texture(brw, tex_obj->mt, view_format,
                                     min_level, num_levels,
                                     min_layer, num_layers,
-                                    false);
+                                    astc_disables_aux);
 
       /* If any programs are using it with texelFetch, we may need to also do
        * a prepare with an sRGB format to ensure texelFetch works "properly".
@@ -460,7 +466,7 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering,
             intel_miptree_prepare_texture(brw, tex_obj->mt, txf_format,
                                           min_level, num_levels,
                                           min_layer, num_layers,
-                                          false);
+                                          astc_disables_aux);
          }
       }
 
@@ -496,6 +502,16 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering,
          }
       }
    }
+
+   /* if an ASTC5x5 is present when we need the workaround, then
+    * the above has made sure that the textures have been resolved
+    * so that they do not need an auxilary buffer, so we clear
+    * texture_with_auxilary_present
+    */
+   if (brw->astc5x5_wa.required &&
+       brw->astc5x5_wa.texture_astc5x5_present) {
+      brw->astc5x5_wa.texture_with_auxilary_present = false;
+   }
 }
 
 static void
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 23bf5a2..505e2bf 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -441,7 +441,8 @@ swizzle_to_scs(GLenum swizzle, bool need_green_to_blue)
    return (need_green_to_blue && scs == HSW_SCS_GREEN) ? HSW_SCS_BLUE : scs;
 }
 
-static void brw_update_texture_surface(struct gl_context *ctx,
+static void
+brw_update_texture_surface(struct gl_context *ctx,
                            unsigned unit,
                            uint32_t *surf_offset,
                            bool for_gather,
@@ -581,7 +582,9 @@ static void brw_update_texture_surface(struct gl_context *ctx,
           obj->Target == GL_TEXTURE_CUBE_MAP_ARRAY)
          view.usage |= ISL_SURF_USAGE_CUBE_BIT;
 
-      enum isl_aux_usage aux_usage =
+      bool disable_aux = brw->astc5x5_wa.required &&
+         brw->astc5x5_wa.texture_astc5x5_present;
+      enum isl_aux_usage aux_usage = (disable_aux) ? ISL_AUX_USAGE_NONE :
          intel_miptree_texture_aux_usage(brw, mt, format);
 
       brw_emit_surface_state(brw, mt, mt->target, view, aux_usage,
-- 
2.7.4