[Mesa-dev] [PATCH v2 3/8] i965/fs: Support 16-bit do_read_vector with VK_KHR_relaxed_block_layout

[Jose Maria Casanova Crespo]

16-bit load_ubo/ssbo operations that call do_untyped_read_vector don't
guarantee that offsets are multiple of 4-bytes as required by untyped_read
message. This happens for example in the case of f16mat3x3 when then
VK_KHR_relaxed_block_layout is enabled.

Vectors reads when we have non-constant offsets are implemented with
multiple byte_scattered_read messages that not require 32-bit aligned offsets.

Now for all constant offsets we can use the untyped_read_surface message.
In the case of constant offsets not aligned to 32-bits, we calculate a
start offset 32-bit aligned and use the shuffle_32bit_load_result_to_16bit_data
function and the first_component parameter to skip the copy of the unneeded
component.

v2: Use untyped_read_surface messages always we have constant offsets.
    (Jason Ekstrand)
---
 src/intel/compiler/brw_fs_nir.cpp | 54 +++++++++++++++++++++++++++++----------
 1 file changed, 40 insertions(+), 14 deletions(-)

diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 5567433a19e..affb242668a 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -2304,28 +2304,54 @@ do_untyped_vector_read(const fs_builder &bld,
 {
    if (type_sz(dest.type) <= 2) {
       assert(dest.stride == 1);
+      boolean is_const_offset = offset_reg.file == BRW_IMMEDIATE_VALUE;
 
-      if (num_components > 1) {
-         /* Pairs of 16-bit components can be read with untyped read, for 16-bit
-          * vec3 4th component is ignored.
+      if (is_const_offset) {
+         uint32_t start = offset_reg.ud & ~3;
+         uint32_t end = offset_reg.ud + num_components * type_sz(dest.type);
+         end = ALIGN(end, 4);
+         assert (end - start <= 16);
+
+         /* At this point we have 16-bit component/s that have constant
+          * offset aligned to 4-bytes that can be read with untyped_reads.
+          * untyped_read message requires 32-bit aligned offsets.
           */
+         unsigned first_component = (offset_reg.ud & 3) / type_sz(dest.type);
+         unsigned num_components_32bit =
+            DIV_ROUND_UP(first_component + num_components, 4 / type_sz(dest.type));
+
          fs_reg read_result =
-            emit_untyped_read(bld, surf_index, offset_reg,
-                              1 /* dims */, DIV_ROUND_UP(num_components, 2),
+            emit_untyped_read(bld, surf_index, brw_imm_ud(start),
+                              1 /* dims */,
+                              num_components_32bit,
                               BRW_PREDICATE_NONE);
          shuffle_32bit_load_result_to_16bit_data(bld,
                retype(dest, BRW_REGISTER_TYPE_W),
                retype(read_result, BRW_REGISTER_TYPE_D),
-               num_components, 0);
+               num_components, first_component);
       } else {
-         assert(num_components == 1);
-         /* scalar 16-bit are read using one byte_scattered_read message */
-         fs_reg read_result =
-            emit_byte_scattered_read(bld, surf_index, offset_reg,
-                                     1 /* dims */, 1,
-                                     type_sz(dest.type) * 8 /* bit_size */,
-                                     BRW_PREDICATE_NONE);
-         bld.MOV(dest, subscript(read_result, dest.type, 0));
+         fs_reg read_offset = bld.vgrf(BRW_REGISTER_TYPE_UD);
+         bld.MOV(read_offset, offset_reg);
+         unsigned first_component = 0;
+         unsigned pending_components = num_components;
+         while (pending_components > 0) {
+            /* Non constant offsets are not guaranteed to be aligned 32-bits
+             * so they are read using one byte_scattered_read message
+             * for each component.
+             */
+            fs_reg read_result =
+               emit_byte_scattered_read(bld, surf_index, read_offset,
+                                        1 /* dims */, 1,
+                                        type_sz(dest.type) * 8 /* bit_size */,
+                                        BRW_PREDICATE_NONE);
+            shuffle_32bit_load_result_to_16bit_data(bld,
+               retype(offset(dest, bld, first_component), BRW_REGISTER_TYPE_W),
+               retype(read_result, BRW_REGISTER_TYPE_D),
+               1, 0);
+            pending_components--;
+            first_component ++;
+            bld.ADD(read_offset, offset_reg, brw_imm_ud(2 * first_component));
+         }
       }
    } else if (type_sz(dest.type) == 4) {
       fs_reg read_result = emit_untyped_read(bld, surf_index, offset_reg,
-- 
2.14.3