[Mesa-dev] [PATCH 4/4] i965/tiled_memcpy: Add support for Yf and Ys tiling/detiling

[Scott D Phillips]

Ilia Mirkin <imirkin at alum.mit.edu> writes:

> On Feb 27, 2018 11:22 PM, "Scott D Phillips" <scott.d.phillips at intel.com>
> wrote:
>
> > Yf and Ys are a family of tilings similar to Y. The actual address
> > bit interleavings for Yf* and Ys* depend upon the bits-per-pixel
> > value of the surface, where 128-, 32-, and 8-bpp tiles are square
> > and 64- and 16-bpp tiles have a 2:1 aspect ratio.
> > 
> > The address bit layout of Yf and Ys are the same in the low
> > 12 bits (4-kbytes); however Ys tiles are actually 64-kbytes in
> > size, but can be handled as if they were composed of 4-kbyte
> > sub-tiles with a different overall tile ordering.
> > 
> > Because all of Y, Yf*, and Ys* have the same least significant
> > 6 bits of address bit layout, the same tiling/detiling routine can
> > be used between them. The inner loop that writes or reads cache
> > lines at a time is the same, while the outer loop (which walks in
> > a mostly linear order) uses different address increment values for
> > each tiling format to adjust the tile addresses.
> > ---
> >  src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 219
> > ++++++++++++++++++++-----
> >  1 file changed, 179 insertions(+), 40 deletions(-)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
> > b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
> > index a78e2b97d45..2b040a69524 100644
> > --- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
> > +++ b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
> > @@ -57,6 +57,12 @@ static const uint32_t xtile_span = 64;
> >  static const uint32_t ytile_width = 128;
> >  static const uint32_t ytile_height = 32;
> >  static const uint32_t ytile_span = 16;
> > +static const uint32_t std_ytile128_width = 256;
> > +static const uint32_t std_ytile128_height = 16;
> > +static const uint32_t std_ytile32_width = 128;
> > +static const uint32_t std_ytile32_height = 32;
> > +static const uint32_t std_ytile8_width = 64;
> > +static const uint32_t std_ytile8_height = 64;
> > 
> >  static inline uint32_t
> >  ror(uint32_t n, uint32_t d)
> > @@ -253,6 +259,48 @@ ytile_addr(uint32_t x, uint32_t y, char *src, uint32_t
> > src_pitch)
> >     return src + (((y >> 5) * (src_pitch >> 7) + (x >> 7)) << 12);
> >  }
> > 
> > +static char *
> > +yf128_addr(uint32_t x, uint32_t y, char *src, uint32_t src_pitch)
> > +{
> > +   return src + (((y >> 4) * (src_pitch >> 8) + (x >> 8)) << 12);
> > +}
> > +
> > +static char *
> > +yf32_addr(uint32_t x, uint32_t y, char *src, uint32_t src_pitch)
> > +{
> > +   return src + (((y >> 5) * (src_pitch >> 7) + (x >> 7)) << 12);
> > +}
> > +
> > +static char *
> > +yf8_addr(uint32_t x, uint32_t y, char *src, uint32_t src_pitch)
> > +{
> > +   return src + (((y >> 6) * (src_pitch >> 6) + (x >> 6)) << 12);
> > +}
> > +
> > +static char *
> > +ys128_addr(uint32_t x, uint32_t y, char *src, uint32_t src_pitch)
> > +{
> > +   return src + (((y & 0x10) << 8) + ((y & 0x20) << 9) + ((x & 0x100) <<
> > 5) +
> > +                 ((x & 200) << 6) +
>
>
> 0x200?
>
> > +                 (((y >> 6) * (src_pitch >> 10) + (x >> 10)) << 16));
> > +}
> > +
> > +static char *
> > +ys32_addr(uint32_t x, uint32_t y, char *src, uint32_t src_pitch)
> > +{
> > +   return src + (((y & 0x20) << 7) + ((y & 0x40) << 8) + ((x & 0x80) << 6)
> > +
> > +                 ((x & 100) << 7) +
>
>
> 0x100? Looks like there are more of these below.

doh, why can't the compiler always tell me when i'm being dumb? as you
can obviously tell the ys and yf stuff is just coded up, not tested yet
(though the y0 stuff is tested). thanks, fixed up locally.

-- 
scott