[Mesa-dev] [PATCH] radv: Add support for ETC2 textures.
Samuel Pitoiset
samuel.pitoiset at gmail.com
Thu Jan 4 09:33:21 UTC 2018
Well, if RadeonSI enables ETC2 I guess it's "safe".
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
On 01/04/2018 01:38 AM, Bas Nieuwenhuizen wrote:
> Was surprised that is even supported by Vega.
> ---
> src/amd/vulkan/radv_device.c | 4 +++-
> src/amd/vulkan/radv_formats.c | 36 ++++++++++++++++++++++++++++++++++++
> src/amd/vulkan/vk_format_layout.csv | 20 ++++++++++----------
> 3 files changed, 49 insertions(+), 11 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
> index cbf8f5cf49..bbed9f0ec2 100644
> --- a/src/amd/vulkan/radv_device.c
> +++ b/src/amd/vulkan/radv_device.c
> @@ -530,6 +530,7 @@ void radv_GetPhysicalDeviceFeatures(
> VkPhysicalDevice physicalDevice,
> VkPhysicalDeviceFeatures* pFeatures)
> {
> + RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
> memset(pFeatures, 0, sizeof(*pFeatures));
>
> *pFeatures = (VkPhysicalDeviceFeatures) {
> @@ -553,7 +554,8 @@ void radv_GetPhysicalDeviceFeatures(
> .alphaToOne = true,
> .multiViewport = true,
> .samplerAnisotropy = true,
> - .textureCompressionETC2 = false,
> + .textureCompressionETC2 = pdevice->rad_info.chip_class >= GFX9 ||
> + pdevice->rad_info.family == CHIP_STONEY,
> .textureCompressionASTC_LDR = false,
> .textureCompressionBC = true,
> .occlusionQueryPrecise = true,
> diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c
> index c008c1bae6..4b0b4c8320 100644
> --- a/src/amd/vulkan/radv_formats.c
> +++ b/src/amd/vulkan/radv_formats.c
> @@ -224,6 +224,28 @@ uint32_t radv_translate_tex_dataformat(VkFormat format,
> }
> }
>
> + if (desc->layout == VK_FORMAT_LAYOUT_ETC) {
> + switch (format) {
> + case VK_FORMAT_ETC2_R8G8B8_UNORM_BLOCK:
> + case VK_FORMAT_ETC2_R8G8B8_SRGB_BLOCK:
> + return V_008F14_IMG_DATA_FORMAT_ETC2_RGB;
> + case VK_FORMAT_ETC2_R8G8B8A1_UNORM_BLOCK:
> + case VK_FORMAT_ETC2_R8G8B8A1_SRGB_BLOCK:
> + return V_008F14_IMG_DATA_FORMAT_ETC2_RGBA1;
> + case VK_FORMAT_ETC2_R8G8B8A8_UNORM_BLOCK:
> + case VK_FORMAT_ETC2_R8G8B8A8_SRGB_BLOCK:
> + return V_008F14_IMG_DATA_FORMAT_ETC2_RGBA;
> + case VK_FORMAT_EAC_R11_UNORM_BLOCK:
> + case VK_FORMAT_EAC_R11_SNORM_BLOCK:
> + return V_008F14_IMG_DATA_FORMAT_ETC2_R;
> + case VK_FORMAT_EAC_R11G11_UNORM_BLOCK:
> + case VK_FORMAT_EAC_R11G11_SNORM_BLOCK:
> + return V_008F14_IMG_DATA_FORMAT_ETC2_RG;
> + default:
> + break;
> + }
> + }
> +
> if (format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32) {
> return V_008F14_IMG_DATA_FORMAT_5_9_9_9;
> } else if (format == VK_FORMAT_B10G11R11_UFLOAT_PACK32) {
> @@ -351,10 +373,15 @@ uint32_t radv_translate_tex_numformat(VkFormat format,
> case VK_FORMAT_BC2_SRGB_BLOCK:
> case VK_FORMAT_BC3_SRGB_BLOCK:
> case VK_FORMAT_BC7_SRGB_BLOCK:
> + case VK_FORMAT_ETC2_R8G8B8_SRGB_BLOCK:
> + case VK_FORMAT_ETC2_R8G8B8A1_SRGB_BLOCK:
> + case VK_FORMAT_ETC2_R8G8B8A8_SRGB_BLOCK:
> return V_008F14_IMG_NUM_FORMAT_SRGB;
> case VK_FORMAT_BC4_SNORM_BLOCK:
> case VK_FORMAT_BC5_SNORM_BLOCK:
> case VK_FORMAT_BC6H_SFLOAT_BLOCK:
> + case VK_FORMAT_EAC_R11_SNORM_BLOCK:
> + case VK_FORMAT_EAC_R11G11_SNORM_BLOCK:
> return V_008F14_IMG_NUM_FORMAT_SNORM;
> default:
> return V_008F14_IMG_NUM_FORMAT_UNORM;
> @@ -557,6 +584,15 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
> return;
> }
>
> + if (desc->layout == VK_FORMAT_LAYOUT_ETC &&
> + physical_device->rad_info.chip_class < GFX9 &&
> + physical_device->rad_info.family != CHIP_STONEY) {
> + out_properties->linearTilingFeatures = linear;
> + out_properties->optimalTilingFeatures = tiled;
> + out_properties->bufferFeatures = buffer;
> + return;
> + }
> +
> if (radv_is_storage_image_format_supported(physical_device, format)) {
> tiled |= VK_FORMAT_FEATURE_STORAGE_IMAGE_BIT;
> linear |= VK_FORMAT_FEATURE_STORAGE_IMAGE_BIT;
> diff --git a/src/amd/vulkan/vk_format_layout.csv b/src/amd/vulkan/vk_format_layout.csv
> index ae9ceda08e..f9c2e6f7c3 100644
> --- a/src/amd/vulkan/vk_format_layout.csv
> +++ b/src/amd/vulkan/vk_format_layout.csv
> @@ -148,16 +148,16 @@ VK_FORMAT_BC6H_UFLOAT_BLOCK , bptc, 4, 4, x128, , , , xyz1
> VK_FORMAT_BC6H_SFLOAT_BLOCK , bptc, 4, 4, x128, , , , xyz1, rgb
> VK_FORMAT_BC7_UNORM_BLOCK , bptc, 4, 4, x128, , , , xyzw, rgb
> VK_FORMAT_BC7_SRGB_BLOCK , bptc, 4, 4, x128, , , , xyzw, srgb
> -VK_FORMAT_ETC2_R8G8B8_UNORM_BLOCK,
> -VK_FORMAT_ETC2_R8G8B8_SRGB_BLOCK,
> -VK_FORMAT_ETC2_R8G8B8A1_UNORM_BLOCK,
> -VK_FORMAT_ETC2_R8G8B8A1_SRGB_BLOCK,
> -VK_FORMAT_ETC2_R8G8B8A8_UNORM_BLOCK,
> -VK_FORMAT_ETC2_R8G8B8A8_SRGB_BLOCK,
> -VK_FORMAT_EAC_R11_UNORM_BLOCK,
> -VK_FORMAT_EAC_R11_SNORM_BLOCK,
> -VK_FORMAT_EAC_R11G11_UNORM_BLOCK,
> -VK_FORMAT_EAC_R11G11_SNORM_BLOCK,
> +VK_FORMAT_ETC2_R8G8B8_UNORM_BLOCK , etc, 4, 4, x64, , , , xyz1, rgb
> +VK_FORMAT_ETC2_R8G8B8_SRGB_BLOCK , etc, 4, 4, x64, , , , xyz1, srgb
> +VK_FORMAT_ETC2_R8G8B8A1_UNORM_BLOCK , etc, 4, 4, x64, , , , xyzw, rgb
> +VK_FORMAT_ETC2_R8G8B8A1_SRGB_BLOCK , etc, 4, 4, x64, , , , xyzw, srgb
> +VK_FORMAT_ETC2_R8G8B8A8_UNORM_BLOCK , etc, 4, 4, x128, , , , xyzw, rgb
> +VK_FORMAT_ETC2_R8G8B8A8_SRGB_BLOCK , etc, 4, 4, x128, , , , xyzw, srgb
> +VK_FORMAT_EAC_R11_UNORM_BLOCK , etc, 4, 4, x64, , , , x001, rgb
> +VK_FORMAT_EAC_R11_SNORM_BLOCK , etc, 4, 4, x64, , , , x001, rgb
> +VK_FORMAT_EAC_R11G11_UNORM_BLOCK , etc, 4, 4, x128, , , , xy01, rgb
> +VK_FORMAT_EAC_R11G11_SNORM_BLOCK , etc, 4, 4, x128, , , , xy01, rgb
> VK_FORMAT_ASTC_4x4_UNORM_BLOCK,
> VK_FORMAT_ASTC_4x4_SRGB_BLOCK,
> VK_FORMAT_ASTC_5x4_UNORM_BLOCK,
>
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