[Mesa-dev] [PATCH 12/15] ac: move address space definitions to common code

Marek Olšák maraeo at gmail.com
Sat Jan 6 11:12:49 UTC 2018


From: Marek Olšák <marek.olsak at amd.com>

---
 src/amd/common/ac_llvm_build.h           |  1 +
 src/amd/common/ac_nir_to_llvm.c          |  9 +++------
 src/gallium/drivers/radeonsi/si_shader.c | 11 +++--------
 3 files changed, 7 insertions(+), 14 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 5d39458..2d6efb5 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -28,20 +28,21 @@
 #include <stdbool.h>
 #include <llvm-c/TargetMachine.h>
 
 #include "amd_family.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 enum {
+	AC_CONST_ADDR_SPACE = 2, /* CONST is the only address space that selects SMEM loads */
 	AC_LOCAL_ADDR_SPACE = 3,
 };
 
 struct ac_llvm_context {
 	LLVMContextRef context;
 	LLVMModuleRef module;
 	LLVMBuilderRef builder;
 
 	LLVMTypeRef voidt;
 	LLVMTypeRef i1;
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 187fdfb..0445d27 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -36,23 +36,20 @@
 #include "ac_exp_param.h"
 
 enum radeon_llvm_calling_convention {
 	RADEON_LLVM_AMDGPU_VS = 87,
 	RADEON_LLVM_AMDGPU_GS = 88,
 	RADEON_LLVM_AMDGPU_PS = 89,
 	RADEON_LLVM_AMDGPU_CS = 90,
 	RADEON_LLVM_AMDGPU_HS = 93,
 };
 
-#define CONST_ADDR_SPACE 2
-#define LOCAL_ADDR_SPACE 3
-
 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
 
 struct nir_to_llvm_context;
 
 struct ac_nir_context {
 	struct ac_llvm_context ac;
 	struct ac_shader_abi *abi;
 
 	gl_shader_stage stage;
@@ -350,21 +347,21 @@ create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
 		LLVMAddTargetDependentFunctionAttr(main_function,
 						   "unsafe-fp-math",
 						   "true");
 	}
 	return main_function;
 }
 
 static LLVMTypeRef const_array(LLVMTypeRef elem_type, int num_elements)
 {
 	return LLVMPointerType(LLVMArrayType(elem_type, num_elements),
-	                       CONST_ADDR_SPACE);
+	                       AC_CONST_ADDR_SPACE);
 }
 
 static int get_elem_bits(struct ac_llvm_context *ctx, LLVMTypeRef type)
 {
 	if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
 		type = LLVMGetElementType(type);
 
 	if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind)
 		return LLVMGetIntTypeWidth(type);
 
@@ -1036,21 +1033,21 @@ static void create_function(struct nir_to_llvm_context *ctx,
 
 	assign_arguments(ctx->main_function, &args);
 
 	user_sgpr_idx = 0;
 
 	if (ctx->options->supports_spill || user_sgpr_info.need_ring_offsets) {
 		set_loc_shader(ctx, AC_UD_SCRATCH_RING_OFFSETS,
 			       &user_sgpr_idx, 2);
 		if (ctx->options->supports_spill) {
 			ctx->ring_offsets = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.implicit.buffer.ptr",
-							       LLVMPointerType(ctx->ac.i8, CONST_ADDR_SPACE),
+							       LLVMPointerType(ctx->ac.i8, AC_CONST_ADDR_SPACE),
 							       NULL, 0, AC_FUNC_ATTR_READNONE);
 			ctx->ring_offsets = LLVMBuildBitCast(ctx->builder, ctx->ring_offsets,
 							     const_array(ctx->ac.v4i32, 16), "");
 		}
 	}
 	
 	/* For merged shaders the user SGPRs start at 8, with 8 system SGPRs in front (including
 	 * the rw_buffers at s0/s1. With user SGPR0 = s8, lets restart the count from 0 */
 	if (has_previous_stage)
 		user_sgpr_idx = 0;
@@ -5564,21 +5561,21 @@ setup_locals(struct ac_nir_context *ctx,
 
 static void
 setup_shared(struct ac_nir_context *ctx,
 	     struct nir_shader *nir)
 {
 	nir_foreach_variable(variable, &nir->shared) {
 		LLVMValueRef shared =
 			LLVMAddGlobalInAddressSpace(
 			   ctx->ac.module, glsl_to_llvm_type(ctx->nctx, variable->type),
 			   variable->name ? variable->name : "",
-			   LOCAL_ADDR_SPACE);
+			   AC_LOCAL_ADDR_SPACE);
 		_mesa_hash_table_insert(ctx->vars, variable, shared);
 	}
 }
 
 static LLVMValueRef
 emit_float_saturate(struct ac_llvm_context *ctx, LLVMValueRef v, float lo, float hi)
 {
 	v = ac_to_float(ctx, v);
 	v = emit_intrin_2f_param(ctx, "llvm.maxnum", ctx->f32, v, LLVMConstReal(ctx->f32, lo));
 	return emit_intrin_2f_param(ctx, "llvm.minnum", ctx->f32, v, LLVMConstReal(ctx->f32, hi));
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 708da13..a1cc6e1 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -92,25 +92,20 @@ static void si_build_tcs_epilog_function(struct si_shader_context *ctx,
 static void si_build_ps_prolog_function(struct si_shader_context *ctx,
 					union si_shader_part_key *key);
 static void si_build_ps_epilog_function(struct si_shader_context *ctx,
 					union si_shader_part_key *key);
 
 /* Ideally pass the sample mask input to the PS epilog as v14, which
  * is its usual location, so that the shader doesn't have to add v_mov.
  */
 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
 
-enum {
-	CONST_ADDR_SPACE = 2,
-	LOCAL_ADDR_SPACE = 3,
-};
-
 static bool llvm_type_is_64bit(struct si_shader_context *ctx,
 			       LLVMTypeRef type)
 {
 	if (type == ctx->ac.i64 || type == ctx->ac.f64)
 		return true;
 
 	return false;
 }
 
 static bool is_merged_shader(struct si_shader *shader)
@@ -2173,31 +2168,31 @@ void si_load_system_value(struct si_shader_context *ctx,
 	}
 
 	ctx->system_values[index] = value;
 }
 
 void si_declare_compute_memory(struct si_shader_context *ctx,
 			       const struct tgsi_full_declaration *decl)
 {
 	struct si_shader_selector *sel = ctx->shader->selector;
 
-	LLVMTypeRef i8p = LLVMPointerType(ctx->i8, LOCAL_ADDR_SPACE);
+	LLVMTypeRef i8p = LLVMPointerType(ctx->i8, AC_LOCAL_ADDR_SPACE);
 	LLVMValueRef var;
 
 	assert(decl->Declaration.MemType == TGSI_MEMORY_TYPE_SHARED);
 	assert(decl->Range.First == decl->Range.Last);
 	assert(!ctx->ac.lds);
 
 	var = LLVMAddGlobalInAddressSpace(ctx->ac.module,
 	                                  LLVMArrayType(ctx->i8, sel->local_size),
 	                                  "compute_lds",
-	                                  LOCAL_ADDR_SPACE);
+	                                  AC_LOCAL_ADDR_SPACE);
 	LLVMSetAlignment(var, 4);
 
 	ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, var, i8p, "");
 }
 
 static LLVMValueRef load_const_buffer_desc(struct si_shader_context *ctx, int i)
 {
 	LLVMValueRef list_ptr = LLVMGetParam(ctx->main_fn,
 					     ctx->param_const_and_shader_buffers);
 
@@ -3828,21 +3823,21 @@ static void clock_emit(
 
 	emit_data->output[0] =
 		LLVMBuildExtractElement(ctx->ac.builder, tmp, ctx->i32_0, "");
 	emit_data->output[1] =
 		LLVMBuildExtractElement(ctx->ac.builder, tmp, ctx->i32_1, "");
 }
 
 LLVMTypeRef si_const_array(LLVMTypeRef elem_type, int num_elements)
 {
 	return LLVMPointerType(LLVMArrayType(elem_type, num_elements),
-			       CONST_ADDR_SPACE);
+			       AC_CONST_ADDR_SPACE);
 }
 
 static void si_llvm_emit_ddxy(
 	const struct lp_build_tgsi_action *action,
 	struct lp_build_tgsi_context *bld_base,
 	struct lp_build_emit_data *emit_data)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	unsigned opcode = emit_data->info->opcode;
 	LLVMValueRef val;
-- 
2.7.4



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