[Mesa-dev] [PATCH 2/3] radv/gfx9: enable LDS for GS only if the ES type is TES

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/amd/vulkan/radv_shader.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 5d777a05e5..58d991e452 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -415,6 +415,7 @@ radv_fill_shader_variant(struct radv_device *device,
 	if (device->physical_device->rad_info.chip_class >= GFX9 &&
 	    stage == MESA_SHADER_GEOMETRY) {
 		struct ac_shader_info *info = &variant->info.info;
+		unsigned es_type = variant->info.gs.es_type;
 		unsigned gs_vgpr_comp_cnt;
 
 		/* If offsets 4, 5 are used, GS_VGPR_COMP_CNT is ignored and
@@ -432,7 +433,7 @@ radv_fill_shader_variant(struct radv_device *device,
 		/* TODO: Figure out how many we actually need. */
 		variant->rsrc1 |= S_00B228_GS_VGPR_COMP_CNT(gs_vgpr_comp_cnt);
 		variant->rsrc2 |= S_00B22C_ES_VGPR_COMP_CNT(3) |
-		                  S_00B22C_OC_LDS_EN(1);
+		                  S_00B22C_OC_LDS_EN(es_type == MESA_SHADER_TESS_EVAL);
 	} else if (device->physical_device->rad_info.chip_class >= GFX9 &&
 	    stage == MESA_SHADER_TESS_CTRL)
 		variant->rsrc1 |= S_00B428_LS_VGPR_COMP_CNT(vgpr_comp_cnt);
-- 
2.15.1