[Mesa-dev] [PATCH 03/20] swr/rast: Add private state parameter in fetcher
George Kyriazis
george.kyriazis at intel.com
Fri Jan 19 21:46:58 UTC 2018
---
.../drivers/swr/rasterizer/core/frontend.cpp | 8 ++---
src/gallium/drivers/swr/rasterizer/core/state.h | 4 +--
.../drivers/swr/rasterizer/jitter/JitManager.cpp | 3 ++
.../drivers/swr/rasterizer/jitter/fetch_jit.cpp | 39 +++++++++++++---------
.../drivers/swr/rasterizer/jitter/fetch_jit.h | 16 ++++-----
5 files changed, 41 insertions(+), 29 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/core/frontend.cpp b/src/gallium/drivers/swr/rasterizer/core/frontend.cpp
index ed8ce15..727b710 100644
--- a/src/gallium/drivers/swr/rasterizer/core/frontend.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/frontend.cpp
@@ -1720,13 +1720,13 @@ void ProcessDraw(
// 1. Execute FS/VS for a single SIMD.
AR_BEGIN(FEFetchShader, pDC->drawId);
#if USE_SIMD16_SHADERS
- state.pfnFetchFunc(fetchInfo_lo, vin);
+ state.pfnFetchFunc(GetPrivateState(pDC), fetchInfo_lo, vin);
#else
- state.pfnFetchFunc(fetchInfo_lo, vin_lo);
+ state.pfnFetchFunc(GetPrivateState(pDC), fetchInfo_lo, vin_lo);
if ((i + KNOB_SIMD_WIDTH) < endVertex) // 1/2 of KNOB_SIMD16_WIDTH
{
- state.pfnFetchFunc(fetchInfo_hi, vin_hi);
+ state.pfnFetchFunc(GetPrivateState(pDC), fetchInfo_hi, vin_hi);
}
#endif
AR_END(FEFetchShader, 0);
@@ -1968,7 +1968,7 @@ void ProcessDraw(
// 1. Execute FS/VS for a single SIMD.
AR_BEGIN(FEFetchShader, pDC->drawId);
- state.pfnFetchFunc(fetchInfo, vout);
+ state.pfnFetchFunc(GetPrivateState(pDC), fetchInfo, vout);
AR_END(FEFetchShader, 0);
// forward fetch generated vertex IDs to the vertex shader
diff --git a/src/gallium/drivers/swr/rasterizer/core/state.h b/src/gallium/drivers/swr/rasterizer/core/state.h
index d11ffc6..c93c37b 100644
--- a/src/gallium/drivers/swr/rasterizer/core/state.h
+++ b/src/gallium/drivers/swr/rasterizer/core/state.h
@@ -873,9 +873,9 @@ static_assert(sizeof(SWR_BLEND_STATE) == 36, "Invalid SWR_BLEND_STATE size");
/// FUNCTION POINTERS FOR SHADERS
#if USE_SIMD16_SHADERS
-typedef void(__cdecl *PFN_FETCH_FUNC)(SWR_FETCH_CONTEXT& fetchInfo, simd16vertex& out);
+typedef void(__cdecl *PFN_FETCH_FUNC)(HANDLE hPrivateData, SWR_FETCH_CONTEXT& fetchInfo, simd16vertex& out);
#else
-typedef void(__cdecl *PFN_FETCH_FUNC)(SWR_FETCH_CONTEXT& fetchInfo, simdvertex& out);
+typedef void(__cdecl *PFN_FETCH_FUNC)(HANDLE hPrivateData, SWR_FETCH_CONTEXT& fetchInfo, simdvertex& out);
#endif
typedef void(__cdecl *PFN_VERTEX_FUNC)(HANDLE hPrivateData, SWR_VS_CONTEXT* pVsContext);
typedef void(__cdecl *PFN_HS_FUNC)(HANDLE hPrivateData, SWR_HS_CONTEXT* pHsContext);
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp b/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp
index 40ca644..fbca1a7 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp
@@ -125,6 +125,9 @@ JitManager::JitManager(uint32_t simdWidth, const char *arch, const char* core)
// typedef void(__cdecl *PFN_FETCH_FUNC)(SWR_FETCH_CONTEXT& fetchInfo, simdvertex& out);
#endif
std::vector<Type*> fsArgs;
+
+ fsArgs.push_back(PointerType::get(Type::getVoidTy(mContext), 0));
+
fsArgs.push_back(PointerType::get(Gen_SWR_FETCH_CONTEXT(this), 0));
#if USE_SIMD16_SHADERS
fsArgs.push_back(PointerType::get(Gen_simd16vertex(this), 0));
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
index ad70cbe..d835f2d 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
@@ -127,6 +127,7 @@ struct FetchJit : public Builder
void CreateGatherOddFormats(SWR_FORMAT format, Value* pMask, Value* pBase, Value* offsets, Value* result[4]);
void ConvertFormat(SWR_FORMAT format, Value *texels[4]);
+ Value* mpPrivateContext;
Value* mpFetchInfo;
};
@@ -145,6 +146,9 @@ Function* FetchJit::Create(const FETCH_COMPILE_STATE& fetchState)
auto argitr = fetch->arg_begin();
// Fetch shader arguments
+ mpPrivateContext = &*argitr; ++argitr;
+ mpPrivateContext->setName("privateContext");
+
mpFetchInfo = &*argitr; ++argitr;
mpFetchInfo->setName("fetchInfo");
Value* pVtxOut = &*argitr;
@@ -2806,8 +2810,10 @@ Value *FetchJit::GenerateCompCtrlVector16(const ComponentControl ctrl)
Value *pId = BITCAST(LOAD(GEP(mpFetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance })), mFP32Ty);
return VBROADCAST_16(pId);
}
+
+
case StoreSrc:
- default:
+ default:
SWR_INVALID("Invalid component control");
return VUNDEF_I_16();
}
@@ -2822,15 +2828,15 @@ Value *FetchJit::GenerateCompCtrlVector(const ComponentControl ctrl)
{
switch (ctrl)
{
- case NoStore:
- return VUNDEF_I();
- case Store0:
- return VIMMED1(0);
- case Store1Fp:
- return VIMMED1(1.0f);
- case Store1Int:
- return VIMMED1(1);
- case StoreVertexId:
+ case NoStore:
+ return VUNDEF_I();
+ case Store0:
+ return VIMMED1(0);
+ case Store1Fp:
+ return VIMMED1(1.0f);
+ case Store1Int:
+ return VIMMED1(1);
+ case StoreVertexId:
{
#if USE_SIMD16_SHADERS
Value *pId;
@@ -2847,15 +2853,17 @@ Value *FetchJit::GenerateCompCtrlVector(const ComponentControl ctrl)
#endif
return pId;
}
- case StoreInstanceId:
+ case StoreInstanceId:
{
Value *pId = BITCAST(LOAD(GEP(mpFetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance })), mFP32Ty);
return VBROADCAST(pId);
}
- case StoreSrc:
- default:
- SWR_INVALID("Invalid component control");
- return VUNDEF_I();
+
+
+ case StoreSrc:
+ default:
+ SWR_INVALID("Invalid component control");
+ return VUNDEF_I();
}
}
@@ -2908,6 +2916,7 @@ PFN_FETCH_FUNC JitFetchFunc(HANDLE hJitMgr, const HANDLE hFunc)
pJitMgr->DumpAsm(const_cast<llvm::Function*>(func), "final");
+
return pfnFetch;
}
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.h b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.h
index 18fa963..e334c20 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.h
+++ b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.h
@@ -46,12 +46,12 @@ struct INPUT_ELEMENT_DESC
uint32_t StreamIndex : 6;
uint32_t InstanceEnable : 1;
uint32_t InstanceStrideEnable : 1;
- uint32_t ComponentControl0 : 3;
- uint32_t ComponentControl1 : 3;
- uint32_t ComponentControl2 : 3;
- uint32_t ComponentControl3 : 3;
+ uint32_t ComponentControl0 : 4;
+ uint32_t ComponentControl1 : 4;
+ uint32_t ComponentControl2 : 4;
+ uint32_t ComponentControl3 : 4;
uint32_t ComponentPacking : 4;
- uint32_t _reserved : 18;
+ uint32_t _reserved : 14;
};
uint64_t bits;
};
@@ -87,7 +87,7 @@ enum ComponentControl
Store1Fp = 3,
Store1Int = 4,
StoreVertexId = 5,
- StoreInstanceId = 6
+ StoreInstanceId = 6,
};
//////////////////////////////////////////////////////////////////////////
@@ -126,9 +126,9 @@ struct FETCH_COMPILE_STATE
if (bForceSequentialAccessEnable != other.bForceSequentialAccessEnable) return false;
if (bInstanceIDOffsetEnable != other.bInstanceIDOffsetEnable) return false;
- for(uint32_t i = 0; i < numAttribs; ++i)
+ for (uint32_t i = 0; i < numAttribs; ++i)
{
- if((layout[i].bits != other.layout[i].bits) ||
+ if ((layout[i].bits != other.layout[i].bits) ||
(((layout[i].InstanceEnable == 1) || (layout[i].InstanceStrideEnable == 1)) &&
(layout[i].InstanceAdvancementState != other.layout[i].InstanceAdvancementState))){
return false;
--
2.7.4
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