[Mesa-dev] [PATCH 2/2] radv: fix RADV_DEBUG=syncshaders on GFX9

[Bas Nieuwenhuizen]

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

On Thu, Jan 25, 2018 at 3:46 PM, Samuel Pitoiset <samuel.pitoiset at gmail.com>
wrote:

> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/amd/vulkan/radv_cmd_buffer.c | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_
> buffer.c
> index ba5fd92f2a1..b694174de68 100644
> --- a/src/amd/vulkan/radv_cmd_buffer.c
> +++ b/src/amd/vulkan/radv_cmd_buffer.c
> @@ -433,13 +433,22 @@ radv_cmd_buffer_after_draw(struct radv_cmd_buffer
> *cmd_buffer,
>                            enum radv_cmd_flush_bits flags)
>  {
>         if (cmd_buffer->device->instance->debug_flags &
> RADV_DEBUG_SYNC_SHADERS) {
> +               uint32_t *ptr = NULL;
> +               uint64_t va = 0;
> +
>                 assert(flags & (RADV_CMD_FLAG_PS_PARTIAL_FLUSH |
>                                 RADV_CMD_FLAG_CS_PARTIAL_FLUSH));
>
> +               if (cmd_buffer->device->physical_device->rad_info.chip_class
> == GFX9) {
> +                       va = radv_buffer_get_va(cmd_buffer->gfx9_fence_bo)
> +
> +                            cmd_buffer->gfx9_fence_offset;
> +                       ptr = &cmd_buffer->gfx9_fence_idx;
> +               }
> +
>                 /* Force wait for graphics or compute engines to be idle.
> */
>                 si_cs_emit_cache_flush(cmd_buffer->cs, false,
>                                        cmd_buffer->device->physical_
> device->rad_info.chip_class,
> -                                      NULL, 0,
> +                                      ptr, va,
>                                        radv_cmd_buffer_uses_mec(cmd_
> buffer),
>                                        flags);
>         }
> --
> 2.16.1
>
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