[Mesa-dev] [PATCH 03/12] radeon/vcn: support picture parameters for HEVC

boyuan.zhang at amd.com boyuan.zhang at amd.com
Thu Jan 25 22:46:41 UTC 2018


From: Boyuan Zhang <boyuan.zhang at amd.com>

Pass pipe_picture_desc instead of pipe_h264_enc_picture_desc so that
it can be used for different codecs. Add functions to handle picture
parameters that will be used for HEVC encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
---
 src/gallium/drivers/radeon/radeon_vcn_enc.c     | 73 +++++++++++++++++++------
 src/gallium/drivers/radeon/radeon_vcn_enc.h     |  2 +-
 src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c | 11 ++--
 3 files changed, 65 insertions(+), 21 deletions(-)

diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.c b/src/gallium/drivers/radeon/radeon_vcn_enc.c
index 06579c8..20be5e6 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc.c
@@ -38,20 +38,62 @@
 #include "radeon_video.h"
 #include "radeon_vcn_enc.h"
 
-static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
+static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_picture_desc *picture)
 {
-	enc->enc_pic.picture_type = pic->picture_type;
-	enc->enc_pic.frame_num = pic->frame_num;
-	enc->enc_pic.pic_order_cnt = pic->pic_order_cnt;
-	enc->enc_pic.pic_order_cnt_type = pic->pic_order_cnt_type;
-	enc->enc_pic.ref_idx_l0 = pic->ref_idx_l0;
-	enc->enc_pic.ref_idx_l1 = pic->ref_idx_l1;
-	enc->enc_pic.not_referenced = pic->not_referenced;
-	enc->enc_pic.is_idr = (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR);
-	enc->enc_pic.crop_left = 0;
-	enc->enc_pic.crop_right = (align(enc->base.width, 16) - enc->base.width) / 2;
-	enc->enc_pic.crop_top = 0;
-	enc->enc_pic.crop_bottom = (align(enc->base.height, 16) - enc->base.height) / 2;
+   if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_MPEG4_AVC) {
+      struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
+      enc->enc_pic.picture_type = pic->picture_type;
+      enc->enc_pic.frame_num = pic->frame_num;
+      enc->enc_pic.pic_order_cnt = pic->pic_order_cnt;
+      enc->enc_pic.pic_order_cnt_type = pic->pic_order_cnt_type;
+      enc->enc_pic.ref_idx_l0 = pic->ref_idx_l0;
+      enc->enc_pic.ref_idx_l1 = pic->ref_idx_l1;
+      enc->enc_pic.not_referenced = pic->not_referenced;
+      enc->enc_pic.is_idr = (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR);
+      enc->enc_pic.crop_left = 0;
+      enc->enc_pic.crop_right = (align(enc->base.width, 16) - enc->base.width) / 2;
+      enc->enc_pic.crop_top = 0;
+      enc->enc_pic.crop_bottom = (align(enc->base.height, 16) - enc->base.height) / 2;
+   } else if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) {
+      struct pipe_h265_enc_picture_desc *pic = (struct pipe_h265_enc_picture_desc *)picture;
+      enc->enc_pic.picture_type = pic->picture_type;
+      enc->enc_pic.frame_num = pic->frame_num;
+      enc->enc_pic.pic_order_cnt = pic->pic_order_cnt;
+      enc->enc_pic.pic_order_cnt_type = pic->pic_order_cnt_type;
+      enc->enc_pic.ref_idx_l0 = pic->ref_idx_l0;
+      enc->enc_pic.ref_idx_l1 = pic->ref_idx_l1;
+      enc->enc_pic.not_referenced = pic->not_referenced;
+      enc->enc_pic.is_idr = (pic->picture_type == PIPE_H265_ENC_PICTURE_TYPE_IDR) ||
+                            (pic->picture_type == PIPE_H265_ENC_PICTURE_TYPE_I);
+      enc->enc_pic.crop_left = 0;
+      enc->enc_pic.crop_right = (align(enc->base.width, 16) - enc->base.width) / 2;
+      enc->enc_pic.crop_top = 0;
+      enc->enc_pic.crop_bottom = (align(enc->base.height, 16) - enc->base.height) / 2;
+      enc->enc_pic.general_tier_flag = pic->seq.general_tier_flag;
+      enc->enc_pic.general_profile_idc = pic->seq.general_profile_idc;
+      enc->enc_pic.general_level_idc = pic->seq.general_level_idc;
+      enc->enc_pic.max_poc = pic->seq.intra_period;
+      enc->enc_pic.log2_max_poc = 0;
+      for (int i = enc->enc_pic.max_poc; i != 0; enc->enc_pic.log2_max_poc++)
+         i = (i >> 1);
+      enc->enc_pic.chroma_format_idc = pic->seq.chroma_format_idc;
+      enc->enc_pic.pic_width_in_luma_samples = pic->seq.pic_width_in_luma_samples;
+      enc->enc_pic.pic_height_in_luma_samples = pic->seq.pic_height_in_luma_samples;
+      enc->enc_pic.log2_diff_max_min_luma_coding_block_size = pic->seq.log2_diff_max_min_luma_coding_block_size;
+      enc->enc_pic.log2_min_transform_block_size_minus2 = pic->seq.log2_min_transform_block_size_minus2;
+      enc->enc_pic.log2_diff_max_min_transform_block_size = pic->seq.log2_diff_max_min_transform_block_size;
+      enc->enc_pic.max_transform_hierarchy_depth_inter = pic->seq.max_transform_hierarchy_depth_inter;
+      enc->enc_pic.max_transform_hierarchy_depth_intra = pic->seq.max_transform_hierarchy_depth_intra;
+      enc->enc_pic.log2_parallel_merge_level_minus2 = pic->pic.log2_parallel_merge_level_minus2;
+      enc->enc_pic.bit_depth_luma_minus8 = pic->seq.bit_depth_luma_minus8;
+      enc->enc_pic.bit_depth_chroma_minus8 = pic->seq.bit_depth_chroma_minus8;
+      enc->enc_pic.nal_unit_type = pic->pic.nal_unit_type;
+      enc->enc_pic.max_num_merge_cand = pic->slice.max_num_merge_cand;
+      enc->enc_pic.sample_adaptive_offset_enabled_flag = pic->seq.sample_adaptive_offset_enabled_flag;
+      enc->enc_pic.pcm_enabled_flag = pic->seq.pcm_enabled_flag;
+      enc->enc_pic.sps_temporal_mvp_enabled_flag = pic->seq.sps_temporal_mvp_enabled_flag;
+      enc->enc_pic.loop_filter_across_tiles_enabled_flag = pic->pic.loop_filter_across_tiles_enabled_flag;
+   }
 }
 
 static void flush(struct radeon_encoder *enc)
@@ -128,9 +170,8 @@ static void radeon_enc_begin_frame(struct pipe_video_codec *encoder,
 {
 	struct radeon_encoder *enc = (struct radeon_encoder*)encoder;
 	struct vl_video_buffer *vid_buf = (struct vl_video_buffer *)source;
-	struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
 
-	radeon_vcn_enc_get_param(enc, pic);
+	radeon_vcn_enc_get_param(enc, picture);
 
 	enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
 	enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
@@ -144,7 +185,7 @@ static void radeon_enc_begin_frame(struct pipe_video_codec *encoder,
 		si_vid_create_buffer(enc->screen, enc->si, 128 * 1024, PIPE_USAGE_STAGING);
 		si_vid_create_buffer(enc->screen, &fb, 4096, PIPE_USAGE_STAGING);
 		enc->fb = &fb;
-		enc->begin(enc, pic);
+		enc->begin(enc, picture);
 		flush(enc);
 		si_vid_destroy_buffer(&fb);
 	}
diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.h b/src/gallium/drivers/radeon/radeon_vcn_enc.h
index 2ec42e4..e8d3136 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc.h
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc.h
@@ -448,7 +448,7 @@ struct radeon_enc_pic {
 struct radeon_encoder {
 	struct pipe_video_codec		base;
 
-	void (*begin)(struct radeon_encoder *enc, struct pipe_h264_enc_picture_desc *pic);
+	void (*begin)(struct radeon_encoder *enc, struct pipe_picture_desc *pic);
 	void (*encode)(struct radeon_encoder *enc);
 	void (*destroy)(struct radeon_encoder *enc);
 
diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
index b985921..06b8092 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
@@ -283,8 +283,9 @@ static void radeon_enc_spec_misc(struct radeon_encoder *enc)
 	RADEON_ENC_END();
 }
 
-static void radeon_enc_rc_session_init(struct radeon_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
+static void radeon_enc_rc_session_init(struct radeon_encoder *enc, struct pipe_picture_desc *picture)
 {
+	struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
 	switch(pic->rate_ctrl.rate_ctrl_method) {
 		case PIPE_H264_ENC_RATE_CONTROL_METHOD_DISABLE:
 			enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_NONE;
@@ -309,8 +310,9 @@ static void radeon_enc_rc_session_init(struct radeon_encoder *enc, struct pipe_h
 	RADEON_ENC_END();
 }
 
-static void radeon_enc_rc_layer_init(struct radeon_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
+static void radeon_enc_rc_layer_init(struct radeon_encoder *enc, struct pipe_picture_desc *picture)
 {
+	struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
 	enc->enc_pic.rc_layer_init.target_bit_rate = pic->rate_ctrl.target_bitrate;
 	enc->enc_pic.rc_layer_init.peak_bit_rate = pic->rate_ctrl.peak_bitrate;
 	enc->enc_pic.rc_layer_init.frame_rate_num = pic->rate_ctrl.frame_rate_num;
@@ -664,8 +666,9 @@ static void radeon_enc_intra_refresh(struct radeon_encoder *enc)
 	RADEON_ENC_END();
 }
 
-static void radeon_enc_rc_per_pic(struct radeon_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
+static void radeon_enc_rc_per_pic(struct radeon_encoder *enc, struct pipe_picture_desc *picture)
 {
+	struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
 	enc->enc_pic.rc_per_pic.qp = pic->quant_i_frames;
 	enc->enc_pic.rc_per_pic.min_qp_app = 0;
 	enc->enc_pic.rc_per_pic.max_qp_app = 51;
@@ -780,7 +783,7 @@ static void radeon_enc_op_speed(struct radeon_encoder *enc)
 	RADEON_ENC_END();
 }
 
-static void begin(struct radeon_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
+static void begin(struct radeon_encoder *enc, struct pipe_picture_desc *pic)
 {
 	radeon_enc_session_info(enc);
 	enc->total_task_size = 0;
-- 
2.7.4



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