[Mesa-dev] [PATCH 3/5] ac: add glc parameter to ac_build_buffer_load_format

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/amd/common/ac_llvm_build.c                    | 3 ++-
 src/amd/common/ac_llvm_build.h                    | 1 +
 src/amd/common/ac_nir_to_llvm.c                   | 4 ++--
 src/gallium/drivers/radeonsi/si_shader.c          | 2 +-
 src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 2 +-
 5 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index a5cb72d..762351f 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -1042,24 +1042,25 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
 	return ac_build_buffer_load_common(ctx, rsrc, vindex, offset,
 					   num_channels, glc, slc,
 					   can_speculate, false);
 }
 
 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
 					 LLVMValueRef rsrc,
 					 LLVMValueRef vindex,
 					 LLVMValueRef voffset,
 					 unsigned num_channels,
+					 bool glc,
 					 bool can_speculate)
 {
 	return ac_build_buffer_load_common(ctx, rsrc, vindex, voffset,
-					   num_channels, false, false,
+					   num_channels, glc, false,
 					   can_speculate, true);
 }
 
 /**
  * Set range metadata on an instruction.  This can only be used on load and
  * call instructions.  If you know an instruction can only produce the values
  * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
  * \p lo is the minimum value inclusive.
  * \p hi is the maximum value exclusive.
  */
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 3ae9678..f95ad6a 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -212,20 +212,21 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
 		     unsigned glc,
 		     unsigned slc,
 		     bool can_speculate,
 		     bool allow_smem);
 
 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
 					 LLVMValueRef rsrc,
 					 LLVMValueRef vindex,
 					 LLVMValueRef voffset,
 					 unsigned num_channels,
+					 bool glc,
 					 bool can_speculate);
 
 LLVMValueRef
 ac_get_thread_id(struct ac_llvm_context *ctx);
 
 #define AC_TID_MASK_TOP_LEFT 0xfffffffc
 #define AC_TID_MASK_TOP      0xfffffffd
 #define AC_TID_MASK_LEFT     0xfffffffe
 
 LLVMValueRef
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index b3336ff..0ab16c4 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2283,21 +2283,21 @@ static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
 					struct ac_image_args *args)
 {
 	if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
 		unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
 
 		return ac_build_buffer_load_format(&ctx->ac,
 						   args->resource,
 						   args->addr,
 						   ctx->ac.i32_0,
 						   util_last_bit(mask),
-						   true);
+						   false, true);
 	}
 
 	args->opcode = ac_image_sample;
 	args->compare = instr->is_shadow;
 
 	switch (instr->op) {
 	case nir_texop_txf:
 	case nir_texop_txf_ms:
 	case nir_texop_samples_identical:
 		args->opcode = lod_is_zero ||
@@ -5341,21 +5341,21 @@ handle_vs_input_decl(struct nir_to_llvm_context *ctx,
 		} else
 			buffer_index = LLVMBuildAdd(ctx->builder, ctx->abi.vertex_id,
 			                            ctx->abi.base_vertex, "");
 		t_offset = LLVMConstInt(ctx->ac.i32, index + i, false);
 
 		t_list = ac_build_load_to_sgpr(&ctx->ac, t_list_ptr, t_offset);
 
 		input = ac_build_buffer_load_format(&ctx->ac, t_list,
 						    buffer_index,
 						    ctx->ac.i32_0,
-						    4, true);
+						    4, false, true);
 
 		for (unsigned chan = 0; chan < 4; chan++) {
 			LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
 			ctx->inputs[radeon_llvm_reg_index_soa(idx, chan)] =
 				ac_to_integer(&ctx->ac, LLVMBuildExtractElement(ctx->builder,
 							input, llvm_chan, ""));
 		}
 	}
 }
 
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index bc621af..aec17fe 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -604,21 +604,21 @@ void si_llvm_load_input_vs(
 		num_fetches = 1;
 		fetch_stride = 0;
 		num_channels = util_last_bit(info->input_usage_mask[input_index]);
 	}
 
 	for (unsigned i = 0; i < num_fetches; i++) {
 		LLVMValueRef voffset = LLVMConstInt(ctx->i32, fetch_stride * i, 0);
 
 		input[i] = ac_build_buffer_load_format(&ctx->ac, t_list,
 						       vertex_index, voffset,
-						       num_channels, true);
+						       num_channels, false, true);
 		input[i] = ac_build_expand_to_vec4(&ctx->ac, input[i], num_channels);
 	}
 
 	/* Break up the vec4 into individual components */
 	for (chan = 0; chan < 4; chan++) {
 		LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, 0);
 		out[chan] = LLVMBuildExtractElement(ctx->ac.builder,
 						    input[0], llvm_chan, "");
 	}
 
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index cdd7c16..c958da6 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -1821,21 +1821,21 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
 	unsigned target = inst->Texture.Texture;
 
 	if (target == TGSI_TEXTURE_BUFFER) {
 		unsigned num_channels =
 			util_last_bit(inst->Dst[0].Register.WriteMask);
 		LLVMValueRef result =
 			ac_build_buffer_load_format(&ctx->ac,
 						    emit_data->args[0],
 						    emit_data->args[2],
 						    emit_data->args[1],
-						    num_channels, true);
+						    num_channels, false, true);
 		emit_data->output[emit_data->chan] =
 			ac_build_expand_to_vec4(&ctx->ac, result, num_channels);
 		return;
 	}
 
 	memcpy(&args, emit_data->args, sizeof(args)); /* ugly */
 
 	args.opcode = ac_image_sample;
 	args.compare = tgsi_is_shadow_target(target);
 	args.offset = inst->Texture.NumOffsets > 0;
-- 
2.7.4