[Mesa-dev] [PATCH v2 00/16] ARB_gl_spirv series 3 v2: support for atomic counters

[Timothy Arceri]

Series looks good to me. How much to go before we can turn this 
extension on?

On 03/07/18 00:58, Alejandro Piñeiro wrote:
> Hi Timothy. Thanks for the quick review!
> 
> As you suggested some squash and commit drops, Im resending the v2 of
> the series, just in case you want a final overview of the series
> (although it is somewhat an overkill, I know).
> 
> The only patch missing a review is "[PATCH 13/16] nir: Fix
> OpAtomicCounterIDecrement for uniform atomic counters"
> 
> As you suggested, the patch that added a utility to get the depth of
> multidimensional arrays was dropped. So "[PATCH 07/16] nir/spirv: Fix
> atomic counter (multidimensional-)arrays" is the patch that had more
> changes, although those were the changes you suggested.
> 
> The patches can be found here (rebased against today master).
> https://github.com/Igalia/mesa/tree/arb_gl_spirv-series3-atomics-counters-v2
> 
> Again, thanks for the quick review
> 
> Alejandro Piñeiro (10):
>    compiler/glsl: refactor empty_uniform_block utilities to linker_util
>    nir/linker: handle uniforms without explicit location
>    spirv/nir: SpvStorageClassAtomicCounter support on
>      vtn_storage_class_to_mode
>    spirv/nir: add offset at vtn_variable
>    nir_types: add glsl_atomic_uint_type() helper
>    spirv/nir: tweak nir type when storage class is
>      SpvStorageClassAtomicCounter
>    spirv/nir: initialize offset on the nir var at vtn_create_variable
>    spirv/nir: add atomic counter support on
>      vtn_handle_ssbo_or_shared_atomic
>    spirv/nir: add capability check for SpvCapabilityAtomicStorage
>    i965: enable AtomicStorage capability for gen7+
> 
> Antia Puentes (3):
>    nir/spirv: Fix atomic counter (multidimensional-)arrays
>    nir: Fix OpAtomicCounterIDecrement for uniform atomic counters
>    mesa/glspirv: lower workgroup access to offsets
> 
> Neil Roberts (3):
>    nir/types: Add wrappers for a couple of atomic counter methods
>    nir/linker: Add a pure NIR implementation of the atomic counter linker
>    i965: Use the new nir atomic counter linker for SPIR-V shaders
> 
>   src/compiler/Makefile.sources                |   1 +
>   src/compiler/glsl/gl_nir_link_atomics.c      | 282 +++++++++++++++++++++++++++
>   src/compiler/glsl/gl_nir_link_uniforms.c     |  64 +++++-
>   src/compiler/glsl/gl_nir_linker.h            |   3 +
>   src/compiler/glsl/gl_nir_lower_atomics.c     |   8 +-
>   src/compiler/glsl/glsl_to_nir.cpp            |   4 +-
>   src/compiler/glsl/link_uniforms.cpp          |  34 +---
>   src/compiler/glsl/linker.cpp                 |  19 +-
>   src/compiler/glsl/linker.h                   |  13 --
>   src/compiler/glsl/linker_util.cpp            |  55 ++++++
>   src/compiler/glsl/linker_util.h              |  21 ++
>   src/compiler/glsl/meson.build                |   1 +
>   src/compiler/nir/nir_intrinsics.py           |   3 +-
>   src/compiler/nir/nir_lower_atomics_to_ssbo.c |   8 +-
>   src/compiler/nir_types.cpp                   |  18 ++
>   src/compiler/nir_types.h                     |   4 +
>   src/compiler/shader_info.h                   |   1 +
>   src/compiler/spirv/spirv_to_nir.c            |  95 ++++++++-
>   src/compiler/spirv/vtn_private.h             |   1 +
>   src/compiler/spirv/vtn_variables.c           |  42 +++-
>   src/mesa/drivers/dri/i965/brw_context.c      |   1 +
>   src/mesa/drivers/dri/i965/brw_link.cpp       |   2 +
>   src/mesa/main/glspirv.c                      |   1 +
>   23 files changed, 599 insertions(+), 82 deletions(-)
>   create mode 100644 src/compiler/glsl/gl_nir_link_atomics.c
>