[Mesa-dev] [PATCH 32/53] intel/fs: Mark LINTERP opcode as writing accumulator implicitly on pre-Gen7.

[Dylan Baker]

Quoting Dylan Baker (2018-06-29 08:28:09)
> Quoting Jason Ekstrand (2018-05-24 14:56:14)
> > From: Francisco Jerez <currojerez at riseup.net>
> > 
> > ---
> >  src/intel/compiler/brw_shader.cpp | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp
> > index 141b64e..61211ef 100644
> > --- a/src/intel/compiler/brw_shader.cpp
> > +++ b/src/intel/compiler/brw_shader.cpp
> > @@ -984,7 +984,8 @@ backend_instruction::writes_accumulator_implicitly(const struct gen_device_info
> >     return writes_accumulator ||
> >            (devinfo->gen < 6 &&
> >             ((opcode >= BRW_OPCODE_ADD && opcode < BRW_OPCODE_NOP) ||
> > -            (opcode >= FS_OPCODE_DDX_COARSE && opcode <= FS_OPCODE_LINTERP)));
> > +            (opcode >= FS_OPCODE_DDX_COARSE && opcode <= FS_OPCODE_LINTERP))) ||
> > +          (devinfo->gen < 7 && opcode == FS_OPCODE_LINTERP);
> >  }
> >  
> >  bool
> > -- 
> > 2.5.0.400.gff86faf
> > 
> > _______________________________________________
> > mesa-dev mailing list
> > mesa-dev at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> 
> Hi Jason,
> 
> This doesn't apply to the 18.1 branch. At the very least
> d3cd6b7215c11054b587fb0fd621c53c6d62c64b from your series is also needed,
> although there are still conflicts after that which are taking a bit more time
> to track down, I can look into it later, but I'd like to get the 18.1.3 release
> done first. If you'd like to drop this instead let me know.
> 
> Dylan

Ping.
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