[Mesa-dev] [PATCH 9/9] winsys/amdgpu: pass the BO list via the CS ioctl on DRM >= 3.27.0
Marek Olšák
maraeo at gmail.com
Thu Jul 12 05:26:40 UTC 2018
From: Marek Olšák <marek.olsak at amd.com>
TODO: requires latest libdrm for amdgpu_bo_handle_type_kms_noimport
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 6 +++
src/gallium/winsys/amdgpu/drm/amdgpu_bo.h | 2 +
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 54 +++++++++++++++++++++--
3 files changed, 58 insertions(+), 4 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index e3d56613dfa..eba8d6e8b3d 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
@@ -473,20 +473,22 @@ static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws,
bo->u.real.va_handle = va_handle;
bo->initial_domain = initial_domain;
bo->unique_id = __sync_fetch_and_add(&ws->next_bo_unique_id, 1);
bo->is_local = !!(request.flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID);
if (initial_domain & RADEON_DOMAIN_VRAM)
ws->allocated_vram += align64(size, ws->info.gart_page_size);
else if (initial_domain & RADEON_DOMAIN_GTT)
ws->allocated_gtt += align64(size, ws->info.gart_page_size);
+ amdgpu_bo_export(bo->bo, amdgpu_bo_handle_type_kms_noimport, &bo->u.real.kms_handle);
+
amdgpu_add_buffer_to_global_list(bo);
return bo;
error_va_map:
amdgpu_va_range_free(va_handle);
error_va_alloc:
amdgpu_bo_free(buf_handle);
@@ -1330,20 +1332,22 @@ static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws,
if (stride)
*stride = whandle->stride;
if (offset)
*offset = whandle->offset;
if (bo->initial_domain & RADEON_DOMAIN_VRAM)
ws->allocated_vram += align64(bo->base.size, ws->info.gart_page_size);
else if (bo->initial_domain & RADEON_DOMAIN_GTT)
ws->allocated_gtt += align64(bo->base.size, ws->info.gart_page_size);
+ amdgpu_bo_export(bo->bo, amdgpu_bo_handle_type_kms_noimport, &bo->u.real.kms_handle);
+
amdgpu_add_buffer_to_global_list(bo);
return &bo->base;
error_va_map:
amdgpu_va_range_free(va_handle);
error_query:
amdgpu_bo_free(result.buf_handle);
@@ -1429,20 +1433,22 @@ static struct pb_buffer *amdgpu_bo_from_ptr(struct radeon_winsys *rws,
bo->user_ptr = pointer;
bo->va = va;
bo->u.real.va_handle = va_handle;
bo->initial_domain = RADEON_DOMAIN_GTT;
bo->unique_id = __sync_fetch_and_add(&ws->next_bo_unique_id, 1);
ws->allocated_gtt += aligned_size;
amdgpu_add_buffer_to_global_list(bo);
+ amdgpu_bo_export(bo->bo, amdgpu_bo_handle_type_kms_noimport, &bo->u.real.kms_handle);
+
return (struct pb_buffer*)bo;
error_va_map:
amdgpu_va_range_free(va_handle);
error_va_alloc:
amdgpu_bo_free(buf_handle);
error:
FREE(bo);
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
index b3dbb3515e9..1e07e4734aa 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
@@ -59,20 +59,22 @@ struct amdgpu_winsys_bo {
struct pb_buffer base;
union {
struct {
struct pb_cache_entry cache_entry;
amdgpu_va_handle va_handle;
int map_count;
bool use_reusable_pool;
struct list_head global_list_item;
+
+ uint32_t kms_handle;
} real;
struct {
struct pb_slab_entry entry;
struct amdgpu_winsys_bo *real;
} slab;
struct {
simple_mtx_t commit_lock;
amdgpu_va_handle va_handle;
enum radeon_bo_flag flags;
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index ac7160a5e51..c0f8b442b1d 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -30,20 +30,24 @@
#include "util/os_time.h"
#include <inttypes.h>
#include <stdio.h>
#include "amd/common/sid.h"
#ifndef AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE
#define AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE (1 << 3)
#endif
+#ifndef AMDGPU_CHUNK_ID_BO_HANDLES
+#define AMDGPU_CHUNK_ID_BO_HANDLES 0x06
+#endif
+
DEBUG_GET_ONCE_BOOL_OPTION(noop, "RADEON_NOOP", false)
/* FENCES */
static struct pipe_fence_handle *
amdgpu_fence_create(struct amdgpu_ctx *ctx, unsigned ip_type,
unsigned ip_instance, unsigned ring)
{
struct amdgpu_fence *fence = CALLOC_STRUCT(amdgpu_fence);
@@ -1283,45 +1287,79 @@ static bool amdgpu_add_sparse_backing_buffers(struct amdgpu_cs_context *cs)
void amdgpu_cs_submit_ib(void *job, int thread_index)
{
struct amdgpu_cs *acs = (struct amdgpu_cs*)job;
struct amdgpu_winsys *ws = acs->ctx->ws;
struct amdgpu_cs_context *cs = acs->cst;
int i, r;
amdgpu_bo_list_handle bo_list = NULL;
uint64_t seq_no = 0;
bool has_user_fence = amdgpu_cs_has_user_fence(cs);
+ bool use_bo_list_create = ws->info.drm_minor < 27;
+ struct drm_amdgpu_bo_list_in bo_list_in;
- /* Create the buffer list.
- * Use a buffer list containing all allocated buffers if requested.
- */
+ /* Prepare the buffer list. */
if (ws->debug_all_bos) {
+ /* The buffer list contains all buffers. This is a slow path that
+ * ensures that no buffer is missing in the BO list.
+ */
struct amdgpu_winsys_bo *bo;
amdgpu_bo_handle *handles;
unsigned num = 0;
simple_mtx_lock(&ws->global_bo_list_lock);
handles = alloca(sizeof(handles[0]) * ws->num_buffers);
LIST_FOR_EACH_ENTRY(bo, &ws->global_bo_list, u.real.global_list_item) {
assert(num < ws->num_buffers);
handles[num++] = bo->bo;
}
r = amdgpu_bo_list_create(ws->dev, ws->num_buffers,
handles, NULL, &bo_list);
simple_mtx_unlock(&ws->global_bo_list_lock);
if (r) {
fprintf(stderr, "amdgpu: buffer list creation failed (%d)\n", r);
goto cleanup;
}
+ } else if (!use_bo_list_create) {
+ /* Standard path passing the buffer list via the CS ioctl. */
+ if (!amdgpu_add_sparse_backing_buffers(cs)) {
+ fprintf(stderr, "amdgpu: amdgpu_add_sparse_backing_buffers failed\n");
+ r = -ENOMEM;
+ goto cleanup;
+ }
+
+ struct drm_amdgpu_bo_list_entry *list =
+ alloca(cs->num_real_buffers * sizeof(struct drm_amdgpu_bo_list_entry));
+
+ unsigned num_handles = 0;
+ for (i = 0; i < cs->num_real_buffers; ++i) {
+ struct amdgpu_cs_buffer *buffer = &cs->real_buffers[i];
+
+ if (buffer->bo->is_local)
+ continue;
+
+ assert(buffer->u.real.priority_usage != 0);
+
+ list[num_handles].bo_handle = buffer->bo->u.real.kms_handle;
+ list[num_handles].bo_priority = (util_last_bit(buffer->u.real.priority_usage) - 1) / 2;
+ ++num_handles;
+ }
+
+ bo_list_in.operation = ~0;
+ bo_list_in.list_handle = ~0;
+ bo_list_in.bo_number = num_handles;
+ bo_list_in.bo_info_size = sizeof(struct drm_amdgpu_bo_list_entry);
+ bo_list_in.bo_info_ptr = (uint64_t)(uintptr_t)list;
} else {
+ /* Legacy path creating the buffer list handle and passing it to the CS ioctl. */
unsigned num_handles;
if (!amdgpu_add_sparse_backing_buffers(cs)) {
fprintf(stderr, "amdgpu: amdgpu_add_sparse_backing_buffers failed\n");
r = -ENOMEM;
goto cleanup;
}
amdgpu_bo_handle *handles = alloca(sizeof(*handles) * cs->num_real_buffers);
uint8_t *flags = alloca(sizeof(*flags) * cs->num_real_buffers);
@@ -1349,21 +1387,21 @@ void amdgpu_cs_submit_ib(void *job, int thread_index)
}
}
}
if (acs->ring_type == RING_GFX)
ws->gfx_bo_list_counter += cs->num_real_buffers;
if (acs->ctx->num_rejected_cs) {
r = -ECANCELED;
} else {
- struct drm_amdgpu_cs_chunk chunks[5];
+ struct drm_amdgpu_cs_chunk chunks[6];
unsigned num_chunks = 0;
/* Convert from dwords to bytes. */
cs->ib[IB_MAIN].ib_bytes *= 4;
/* IB */
chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_IB;
chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_cs_chunk_ib) / 4;
chunks[num_chunks].chunk_data = (uintptr_t)&cs->ib[IB_MAIN];
num_chunks++;
@@ -1440,20 +1478,28 @@ void amdgpu_cs_submit_ib(void *job, int thread_index)
sem_chunk[i].handle = fence->syncobj;
}
chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_SYNCOBJ_OUT;
chunks[num_chunks].length_dw = sizeof(sem_chunk[0]) / 4
* cs->num_syncobj_to_signal;
chunks[num_chunks].chunk_data = (uintptr_t)sem_chunk;
num_chunks++;
}
+ /* BO list */
+ if (!use_bo_list_create) {
+ chunks[num_chunks].chunk_id = AMDGPU_CHUNK_ID_BO_HANDLES;
+ chunks[num_chunks].length_dw = sizeof(struct drm_amdgpu_bo_list_in) / 4;
+ chunks[num_chunks].chunk_data = (uintptr_t)&bo_list_in;
+ num_chunks++;
+ }
+
assert(num_chunks <= ARRAY_SIZE(chunks));
r = amdgpu_cs_submit_raw(ws->dev, acs->ctx->ctx, bo_list,
num_chunks, chunks, &seq_no);
}
if (r) {
if (r == -ENOMEM)
fprintf(stderr, "amdgpu: Not enough memory for command submission.\n");
else if (r == -ECANCELED)
--
2.17.1
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