[Mesa-dev] [PATCH] nouveau: fix 3D blitter for unsigned to signed integer conversions

[Karol Herbst]

On Sat, Jul 14, 2018 at 8:49 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote:
> I'd much rather see the INT_CLAMP be a bit on the mode (e.g. the high
> bit), which you get at the beginning and then remove from the mode.
> That way you don't have to keep checking for it.
>

yeah, sadly that won't help, because we have plenty of those
"blitter->fp[targ][mode]" accesses to cache the generated shader. Sure
we can mask the high bit away, but somehow I don't think this will be
less work than what I've already did.

> On Sun, Jun 24, 2018 at 5:00 PM, Karol Herbst <kherbst at redhat.com> wrote:
>> fixes a couple of packed_pixel CTS tests. No regressions inside a CTS run.
>>
>> Signed-off-by: Karol Herbst <kherbst at redhat.com>
>> ---
>>  src/gallium/drivers/nouveau/nv50/nv50_blit.h  | 21 ++++++++++---------
>>  .../drivers/nouveau/nv50/nv50_surface.c       | 14 +++++++++++--
>>  2 files changed, 23 insertions(+), 12 deletions(-)
>>
>> diff --git a/src/gallium/drivers/nouveau/nv50/nv50_blit.h b/src/gallium/drivers/nouveau/nv50/nv50_blit.h
>> index 10fe5274b10..01667bb5f66 100644
>> --- a/src/gallium/drivers/nouveau/nv50/nv50_blit.h
>> +++ b/src/gallium/drivers/nouveau/nv50/nv50_blit.h
>> @@ -17,16 +17,17 @@ nv50_blit_select_mode(const struct pipe_blit_info *);
>>  void
>>  nv50_resource_resolve(struct pipe_context *, const struct pipe_resolve_info *);
>>
>> -#define NV50_BLIT_MODE_PASS  0 /* pass through TEX $t0/$s0 output */
>> -#define NV50_BLIT_MODE_Z24S8 1 /* encode ZS values for RGBA unorm8 */
>> -#define NV50_BLIT_MODE_S8Z24 2
>> -#define NV50_BLIT_MODE_X24S8 3
>> -#define NV50_BLIT_MODE_S8X24 4
>> -#define NV50_BLIT_MODE_Z24X8 5
>> -#define NV50_BLIT_MODE_X8Z24 6
>> -#define NV50_BLIT_MODE_ZS    7 /* put $t0/$s0 into R, $t1/$s1 into G */
>> -#define NV50_BLIT_MODE_XS    8 /* put $t1/$s1 into G */
>> -#define NV50_BLIT_MODES      9
>> +#define NV50_BLIT_MODE_PASS       0 /* pass through TEX $t0/$s0 output */
>> +#define NV50_BLIT_MODE_Z24S8      1 /* encode ZS values for RGBA unorm8 */
>> +#define NV50_BLIT_MODE_S8Z24      2
>> +#define NV50_BLIT_MODE_X24S8      3
>> +#define NV50_BLIT_MODE_S8X24      4
>> +#define NV50_BLIT_MODE_Z24X8      5
>> +#define NV50_BLIT_MODE_X8Z24      6
>> +#define NV50_BLIT_MODE_ZS         7 /* put $t0/$s0 into R, $t1/$s1 into G */
>> +#define NV50_BLIT_MODE_XS         8 /* put $t1/$s1 into G */
>> +#define NV50_BLIT_MODE_INT_CLAMP  9 /* unsigned to signed integer conversion */
>> +#define NV50_BLIT_MODES          10
>>
>>  /* CUBE and RECT textures are reinterpreted as 2D(_ARRAY) */
>>  #define NV50_BLIT_TEXTURE_BUFFER    0
>> diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
>> index 037e14a4d60..d214714a5dc 100644
>> --- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
>> +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
>> @@ -893,6 +893,7 @@ nv50_blitter_make_fp(struct pipe_context *pipe,
>>     bool cvt_un8 = false;
>>
>>     if (mode != NV50_BLIT_MODE_PASS &&
>> +       mode != NV50_BLIT_MODE_INT_CLAMP &&
>>         mode != NV50_BLIT_MODE_Z24X8 &&
>>         mode != NV50_BLIT_MODE_X8Z24)
>>        tex_s = true;
>> @@ -903,6 +904,7 @@ nv50_blitter_make_fp(struct pipe_context *pipe,
>>        tex_rgbaz = true;
>>
>>     if (mode != NV50_BLIT_MODE_PASS &&
>> +       mode != NV50_BLIT_MODE_INT_CLAMP &&
>>         mode != NV50_BLIT_MODE_ZS &&
>>         mode != NV50_BLIT_MODE_XS)
>>        cvt_un8 = true;
>> @@ -930,12 +932,17 @@ nv50_blitter_make_fp(struct pipe_context *pipe,
>>                 ureg_scalar(ureg_src(data), TGSI_SWIZZLE_X));
>>     }
>>     if (tex_rgbaz) {
>> -      const unsigned mask = (mode == NV50_BLIT_MODE_PASS) ?
>> +      const unsigned mask = (mode == NV50_BLIT_MODE_PASS ||
>> +                             mode == NV50_BLIT_MODE_INT_CLAMP) ?
>>           TGSI_WRITEMASK_XYZW : TGSI_WRITEMASK_X;
>>        ureg_TEX(ureg, ureg_writemask(data, mask),
>>                 target, tc, ureg_DECL_sampler(ureg, 0));
>>     }
>>
>> +   /* handle signed to unsigned integer conversions */
>> +   if (mode == NV50_BLIT_MODE_INT_CLAMP)
>> +      ureg_UMIN(ureg, data, ureg_src(data), ureg_imm1u(ureg, 0x7fffffff));
>> +
>>     if (cvt_un8) {
>>        struct ureg_src mask;
>>        struct ureg_src scale;
>> @@ -983,7 +990,7 @@ nv50_blitter_make_fp(struct pipe_context *pipe,
>>     } else {
>>        unsigned mask = TGSI_WRITEMASK_XYZW;
>>
>> -      if (mode != NV50_BLIT_MODE_PASS) {
>> +      if (mode != NV50_BLIT_MODE_PASS && mode != NV50_BLIT_MODE_INT_CLAMP) {
>>           mask &= ~TGSI_WRITEMASK_ZW;
>>           if (!tex_s)
>>              mask = TGSI_WRITEMASK_X;
>> @@ -1058,6 +1065,9 @@ nv50_blit_select_mode(const struct pipe_blit_info *info)
>>           return NV50_BLIT_MODE_XS;
>>        }
>>     default:
>> +      if (util_format_is_pure_uint(info->src.format) &&
>> +          util_format_is_pure_sint(info->dst.format))
>> +         return NV50_BLIT_MODE_INT_CLAMP;
>>        return NV50_BLIT_MODE_PASS;
>>     }
>>  }
>> --
>> 2.17.1
>>
>> _______________________________________________
>> mesa-dev mailing list
>> mesa-dev at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev