[Mesa-dev] [PATCH 3/4] nir: allow nir_intrinsic_load_ubo in opt_peephole_select

Timothy Arceri tarceri at itsqueeze.com
Sun Jul 15 23:26:34 UTC 2018


This makes this opt behave more like the GLSL IR opt
lower_if_to_cond_assign(). With this we can disable that GLSL IR
opt on drivers with a NIR backend without causing spill
regressions.

shader-db results for radeonsi (RX580):

Totals from affected shaders:
SGPRS: 12200 -> 13072 (7.15 %)
VGPRS: 13496 -> 11840 (-12.27 %)
Spilled SGPRs: 285 -> 290 (1.75 %)
Spilled VGPRs: 115 -> 0 (-100.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 116 -> 0 (-100.00 %) dwords per thread
Code Size: 781304 -> 770168 (-1.43 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 1558 -> 1586 (1.80 %)
Wait states: 0 -> 0 (0.00 %)

Cc: Eric Anholt <eric at anholt.net>
---
 src/compiler/nir/nir_opt_peephole_select.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/compiler/nir/nir_opt_peephole_select.c b/src/compiler/nir/nir_opt_peephole_select.c
index ad9d0abec03..898660dd810 100644
--- a/src/compiler/nir/nir_opt_peephole_select.c
+++ b/src/compiler/nir/nir_opt_peephole_select.c
@@ -77,6 +77,7 @@ block_check_for_allowed_instrs(nir_block *block, unsigned *count, bool alu_ok)
             }
             break;
 
+         case nir_intrinsic_load_ubo:
          case nir_intrinsic_load_uniform:
             if (!alu_ok)
                return false;
-- 
2.17.1



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