[Mesa-dev] [PATCH] i965: batchbuffer: write correct canonical offset with softpin

[Lionel Landwerlin]

Addresses in the command streams should be in canonical form (i.e
bit[63:48] == bit[47]). If the [bo->gtt_offset, bo->gtt_offset +
target_offset] range contains the address 0x800000000000, the current
code will fail that criteria.

Fixes: 1c9053d0765dc6 ("i965: Prepare batchbuffer module for softpin support.")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
---
 src/mesa/drivers/dri/i965/intel_batchbuffer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index df999ffeb1d..8079ac85ea1 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -922,7 +922,7 @@ emit_reloc(struct intel_batchbuffer *batch,
 
    if (target->kflags & EXEC_OBJECT_PINNED) {
       brw_use_pinned_bo(batch, target, reloc_flags & RELOC_WRITE);
-      return target->gtt_offset + target_offset;
+      return gen_canonical_address(target->gtt_offset + target_offset);
    }
 
    unsigned int index = add_exec_bo(batch, target);
-- 
2.18.0