[Mesa-dev] [PATCH] nvc0: add missing increments to gpu_serialize_count

Rhys Perry pendingchaos02 at gmail.com
Thu Jul 19 13:44:12 UTC 2018


Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
---
 src/gallium/drivers/nouveau/nvc0/nvc0_context.c     | 4 ++++
 src/gallium/drivers/nouveau/nvc0/nvc0_program.c     | 2 ++
 src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c | 2 ++
 src/gallium/drivers/nouveau/nvc0/nve4_compute.c     | 2 ++
 4 files changed, 10 insertions(+)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
index 2e4490b8d9..43545d3dfd 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
@@ -51,6 +51,8 @@ nvc0_texture_barrier(struct pipe_context *pipe, unsigned flags)
 
    IMMED_NVC0(push, NVC0_3D(SERIALIZE), 0);
    IMMED_NVC0(push, NVC0_3D(TEX_CACHE_CTL), 0);
+
+   NOUVEAU_DRV_STAT(nouveau_context(pipe)->screen, gpu_serialize_count, 1);
 }
 
 static void
@@ -93,6 +95,8 @@ nvc0_memory_barrier(struct pipe_context *pipe, unsigned flags)
        * without that.
        */
       IMMED_NVC0(push, NVC0_3D(SERIALIZE), 0);
+
+      NOUVEAU_DRV_STAT(&nvc0->screen->base, gpu_serialize_count, 1);
    }
 
    /* If we're going to texture from a buffer/image written by a shader, we
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index 57d98753f4..36f2ba4ba8 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -825,6 +825,8 @@ nvc0_program_upload(struct nvc0_context *nvc0, struct nvc0_program *prog)
       /* Make sure to synchronize before deleting the code segment. */
       IMMED_NVC0(nvc0->base.pushbuf, NVC0_3D(SERIALIZE), 0);
 
+      NOUVEAU_DRV_STAT(&screen->base, gpu_serialize_count, 1);
+
       if ((screen->text->size << 1) <= (1 << 23)) {
          ret = nvc0_screen_resize_text_area(screen, screen->text->size << 1);
          if (ret) {
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
index df5723dc37..5963fc2577 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
@@ -2613,6 +2613,8 @@ nvc0_hw_sm_end_query(struct nvc0_context *nvc0, struct nvc0_hw_query *hq)
          PUSH_DATA (push, (cfg->ctr[i].func << 4) | cfg->ctr[i].mode);
       }
    }
+
+   NOUVEAU_DRV_STAT(&screen->base, gpu_serialize_count, 1);
 }
 
 static inline bool
diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
index 28460f8cbe..4bedacd9ec 100644
--- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
+++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
@@ -129,6 +129,8 @@ nve4_screen_compute_setup(struct nvc0_screen *screen,
       for (i = 63; i >= 0; i--)
          PUSH_DATA(push, 0x38000 | i);
       IMMED_NVC0(push, SUBC_CP(NV50_GRAPH_SERIALIZE), 0);
+
+      NOUVEAU_DRV_STAT(&screen->base, gpu_serialize_count, 1);
    }
 
    BEGIN_NVC0(push, NVE4_CP(TEX_CB_INDEX), 1);
-- 
2.14.4



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