[Mesa-dev] [PATCH v2] intel/ppgtt: memory address alignment
Chris Wilson
chris at chris-wilson.co.uk
Wed Jul 25 07:48:17 UTC 2018
Quoting Sergii Romantsov (2018-07-25 08:42:55)
> Hello,
> here is a backtrace:
...
Please try:
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index 09d45e30ecc..8274c2e0b2f 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
@@ -496,7 +496,6 @@ bo_alloc_internal(struct brw_bufmgr *bufmgr,
uint32_t stride)
{
struct brw_bo *bo;
- unsigned int page_size = getpagesize();
int ret;
struct bo_cache_bucket *bucket;
bool alloc_from_cache;
@@ -522,12 +521,12 @@ bo_alloc_internal(struct brw_bufmgr *bufmgr,
* allocation up.
*/
if (bucket == NULL) {
- bo_size = size;
- if (bo_size < page_size)
- bo_size = page_size;
+ unsigned int page_size = getpagesize();
+ bo_size = ALIGN(size, page_size);
} else {
bo_size = bucket->size;
}
+ assert(bo_size);
mtx_lock(&bufmgr->lock);
/* Get a buffer out of the cache if available */
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