[Mesa-dev] [PATCH 2/2] intel/compiler: implement 8-bit constant load

[Jason Ekstrand]

Both are

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

Please add the appropriate Fixes: tag prior to pushing.

On Fri, Jul 27, 2018 at 4:39 AM Jose Maria Casanova Crespo <
jmcasanova at igalia.com> wrote:

> From: Iago Toral Quiroga <itoral at igalia.com>
>
> ---
>  src/intel/compiler/brw_fs_nir.cpp | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index 2c8595b9730..6e9a5829d3b 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -1587,6 +1587,11 @@ fs_visitor::nir_emit_load_const(const fs_builder
> &bld,
>     fs_reg reg = bld.vgrf(reg_type, instr->def.num_components);
>
>     switch (instr->def.bit_size) {
> +   case 8:
> +      for (unsigned i = 0; i < instr->def.num_components; i++)
> +         bld.MOV(offset(reg, bld, i), setup_imm_b(bld,
> instr->value.i8[i]));
> +      break;
> +
>     case 16:
>        for (unsigned i = 0; i < instr->def.num_components; i++)
>           bld.MOV(offset(reg, bld, i), brw_imm_w(instr->value.i16[i]));
> --
> 2.17.1
>
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