[Mesa-dev] [PATCH v4 008/129] anv, i965, radv, st, ir3: Call nir_lower_deref_instrs
Jason Ekstrand
jason at jlekstrand.net
Fri Jun 1 05:01:51 UTC 2018
This inserts a call to nir_lower_deref_instrs at every call site of
glsl_to_nir, spirv_to_nir, and prog_to_nir.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
---
src/amd/vulkan/radv_shader.c | 4 ++++
src/gallium/drivers/freedreno/ir3/ir3_cmdline.c | 3 +++
src/gallium/drivers/freedreno/ir3/ir3_nir.c | 4 +++-
src/gallium/drivers/v3d/v3d_program.c | 1 +
src/gallium/drivers/vc4/vc4_program.c | 1 +
src/intel/blorp/blorp.c | 2 ++
src/intel/vulkan/anv_pipeline.c | 2 ++
src/mesa/drivers/dri/i965/brw_program.c | 8 ++++++--
src/mesa/drivers/dri/i965/brw_tcs.c | 1 +
src/mesa/state_tracker/st_glsl_to_nir.cpp | 1 +
10 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 68f2a55..93b7568 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -176,6 +176,8 @@ radv_shader_compile_to_nir(struct radv_device *device,
assert(exec_list_length(&nir->functions) == 1);
struct exec_node *node = exec_list_get_head(&nir->functions);
entry_point = exec_node_data(nir_function, node, node);
+
+ NIR_PASS_V(nir, nir_lower_deref_instrs, ~0);
} else {
uint32_t *spirv = (uint32_t *) module->data;
assert(module->size % 4 == 0);
@@ -233,6 +235,8 @@ radv_shader_compile_to_nir(struct radv_device *device,
free(spec_entries);
+ NIR_PASS_V(nir, nir_lower_deref_instrs, ~0);
+
/* We have to lower away local constant initializers right before we
* inline functions. That way they get properly initialized at the top
* of the function and not at the top of its caller.
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
index 55809d5..ab2fbf6 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
@@ -113,6 +113,7 @@ load_glsl(unsigned num_files, char* const* files, gl_shader_stage stage)
errx(1, "couldn't parse `%s'", files[0]);
nir_shader *nir = glsl_to_nir(prog, stage, ir3_get_compiler_options(compiler));
+ nir_lower_deref_instrs(nir, ~0);
/* required NIR passes: */
/* TODO cmdline args for some of the conditional lowering passes? */
@@ -232,6 +233,8 @@ load_spirv(const char *filename, const char *entry, gl_shader_stage stage)
&spirv_options,
ir3_get_compiler_options(compiler));
+ NIR_PASS_V(entry_point->shader, nir_lower_deref_instrs, ~0);
+
nir_print_shader(entry_point->shader, stdout);
return entry_point->shader;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_nir.c
index cd1f9c5..9d87c26 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_nir.c
@@ -56,7 +56,9 @@ static const nir_shader_compiler_options options = {
struct nir_shader *
ir3_tgsi_to_nir(const struct tgsi_token *tokens)
{
- return tgsi_to_nir(tokens, &options);
+ struct nir_shader *shader = tgsi_to_nir(tokens, &options);
+ NIR_PASS_V(shader, nir_lower_deref_instrs, ~0);
+ return shader;
}
const nir_shader_compiler_options *
diff --git a/src/gallium/drivers/v3d/v3d_program.c b/src/gallium/drivers/v3d/v3d_program.c
index 036f7c6..5ebb665 100644
--- a/src/gallium/drivers/v3d/v3d_program.c
+++ b/src/gallium/drivers/v3d/v3d_program.c
@@ -207,6 +207,7 @@ v3d_shader_state_create(struct pipe_context *pctx,
fprintf(stderr, "\n");
}
s = tgsi_to_nir(cso->tokens, &v3d_nir_options);
+ NIR_PASS_V(s, nir_lower_deref_instrs, ~0);
so->was_tgsi = true;
}
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 3676131..e4ad329 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -2480,6 +2480,7 @@ vc4_shader_state_create(struct pipe_context *pctx,
fprintf(stderr, "\n");
}
s = tgsi_to_nir(cso->tokens, &nir_options);
+ NIR_PASS_V(s, nir_lower_deref_instrs, ~0);
}
NIR_PASS_V(s, nir_opt_global_to_local);
diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index 73f8c67..58d858d 100644
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -204,6 +204,7 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
*/
wm_prog_data->base.binding_table.texture_start = BLORP_TEXTURE_BT_INDEX;
+ nir_lower_deref_instrs(nir, ~0);
nir = brw_preprocess_nir(compiler, nir);
nir_remove_dead_variables(nir, nir_var_shader_in);
nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
@@ -233,6 +234,7 @@ blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx,
nir->options =
compiler->glsl_compiler_options[MESA_SHADER_VERTEX].NirOptions;
+ nir_lower_deref_instrs(nir, ~0);
nir = brw_preprocess_nir(compiler, nir);
nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 8f30136..4f4d52c 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -172,6 +172,8 @@ anv_shader_compile_to_nir(struct anv_pipeline *pipeline,
nir_print_shader(nir, stderr);
}
+ NIR_PASS_V(nir, nir_lower_deref_instrs, ~0);
+
/* We have to lower away local constant initializers right before we
* inline functions. That way they get properly initialized at the top
* of the function and not at the top of its caller.
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index 446aaee..3b192a0 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -77,10 +77,13 @@ brw_create_nir(struct brw_context *brw,
/* First, lower the GLSL/Mesa IR or SPIR-V to NIR */
if (shader_prog) {
- if (shader_prog->_LinkedShaders[stage]->spirv_data)
+ if (shader_prog->_LinkedShaders[stage]->spirv_data) {
nir = _mesa_spirv_to_nir(ctx, shader_prog, stage, options);
- else
+ nir_lower_deref_instrs(nir, ~0);
+ } else {
nir = glsl_to_nir(shader_prog, stage, options);
+ nir_lower_deref_instrs(nir, ~0);
+ }
assert (nir);
nir_remove_dead_variables(nir, nir_var_shader_in | nir_var_shader_out);
@@ -90,6 +93,7 @@ brw_create_nir(struct brw_context *brw,
nir_shader_get_entrypoint(nir), true, false);
} else {
nir = prog_to_nir(prog, options);
+ nir_lower_deref_instrs(nir, ~0);
NIR_PASS_V(nir, nir_lower_regs_to_ssa); /* turn registers into SSA */
}
nir_validate_shader(nir);
diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
index 931ef64..277c5e4 100644
--- a/src/mesa/drivers/dri/i965/brw_tcs.c
+++ b/src/mesa/drivers/dri/i965/brw_tcs.c
@@ -109,6 +109,7 @@ create_passthrough_tcs(void *mem_ctx, const struct brw_compiler *compiler,
}
nir_validate_shader(nir);
+ nir_lower_deref_instrs(nir, ~0);
nir = brw_preprocess_nir(compiler, nir);
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index de906e6..fa6bfe8 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -367,6 +367,7 @@ st_glsl_to_nir(struct st_context *st, struct gl_program *prog,
return prog->nir;
nir_shader *nir = glsl_to_nir(shader_program, stage, options);
+ nir_lower_deref_instrs(nir, (nir_lower_deref_flags)~0);
/* Set the next shader stage hint for VS and TES. */
if (!nir->info.separate_shader &&
--
2.5.0.400.gff86faf
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