[Mesa-dev] [PATCH 10/14] radeonsi/gfx9: update primitive binning code for EQAA
Marek Olšák
maraeo at gmail.com
Fri Jun 1 05:21:18 UTC 2018
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeonsi/si_state_binning.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c
index 2605b59bbef..895374e4f42 100644
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -59,37 +59,37 @@ static struct uvec2 si_find_bin_size(struct si_screen *sscreen,
break;
}
struct uvec2 size = {subtable[i].bin_size_x, subtable[i].bin_size_y};
return size;
}
static struct uvec2 si_get_color_bin_size(struct si_context *sctx,
unsigned cb_target_enabled_4bit)
{
- unsigned nr_samples = sctx->framebuffer.nr_samples;
+ unsigned num_fragments = sctx->framebuffer.nr_color_samples;
unsigned sum = 0;
/* Compute the sum of all Bpp. */
for (unsigned i = 0; i < sctx->framebuffer.state.nr_cbufs; i++) {
if (!(cb_target_enabled_4bit & (0xf << (i * 4))))
continue;
struct r600_texture *rtex =
(struct r600_texture*)sctx->framebuffer.state.cbufs[i]->texture;
sum += rtex->surface.bpe;
}
/* Multiply the sum by some function of the number of samples. */
- if (nr_samples >= 2) {
+ if (num_fragments >= 2) {
if (si_get_ps_iter_samples(sctx) >= 2)
- sum *= nr_samples;
+ sum *= num_fragments;
else
sum *= 2;
}
static const si_bin_size_subtable table[] = {
{
/* One RB / SE */
{
/* One shader engine */
{ 0, 128, 128 },
@@ -198,21 +198,21 @@ static struct uvec2 si_get_depth_bin_size(struct si_context *sctx)
struct uvec2 size = {512, 512};
return size;
}
struct r600_texture *rtex =
(struct r600_texture*)sctx->framebuffer.state.zsbuf->texture;
unsigned depth_coeff = dsa->depth_enabled ? 5 : 0;
unsigned stencil_coeff = rtex->surface.has_stencil &&
dsa->stencil_enabled ? 1 : 0;
unsigned sum = 4 * (depth_coeff + stencil_coeff) *
- sctx->framebuffer.nr_samples;
+ rtex->buffer.b.b.nr_samples;
static const si_bin_size_subtable table[] = {
{
// One RB / SE
{
// One shader engine
{ 0, 128, 256 },
{ 2, 128, 128 },
{ 4, 64, 128 },
{ 7, 32, 128 },
@@ -386,22 +386,27 @@ void si_emit_dpbb_state(struct si_context *sctx)
: depth_bin_size;
if (!bin_size.x || !bin_size.y) {
si_emit_dpbb_disable(sctx);
return;
}
/* Enable DFSM if it's preferred. */
unsigned punchout_mode = V_028060_FORCE_OFF;
bool disable_start_of_prim = true;
+ bool zs_eqaa_dfsm_bug = sctx->chip_class == GFX9 &&
+ sctx->framebuffer.state.zsbuf &&
+ sctx->framebuffer.nr_samples !=
+ sctx->framebuffer.state.zsbuf->texture->nr_samples;
if (sscreen->dfsm_allowed &&
+ !zs_eqaa_dfsm_bug &&
cb_target_enabled_4bit &&
!G_02880C_KILL_ENABLE(db_shader_control) &&
/* These two also imply that DFSM is disabled when PS writes to memory. */
!G_02880C_EXEC_ON_HIER_FAIL(db_shader_control) &&
!G_02880C_EXEC_ON_NOOP(db_shader_control) &&
G_02880C_Z_ORDER(db_shader_control) == V_02880C_EARLY_Z_THEN_LATE_Z) {
punchout_mode = V_028060_AUTO;
disable_start_of_prim = (cb_target_enabled_4bit &
blend->blend_enable_4bit) != 0;
}
--
2.17.0
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