[Mesa-dev] [PATCH 00/23] intel: Assorted code generation improvements.

Francisco Jerez currojerez at riseup.net
Tue Jun 12 02:25:52 UTC 2018

This series contains a few code generation refactors and clean-ups
that are starting to pile up in an internal branch.  By itself this
series shouldn't cause any functional changes, but there's no reason
why it couldn't be reviewed already which would lessen our pain
keeping the branch up-to-date.

Patches 1-16 rework the mechanism used in most of the back-end code
generator to construct message descriptors in-place as part of the
immediate of either a SEND(C) instruction or some other ALU
instruction, which won't work as soon as we introduce support for the
SENDS instruction and has proven to be rather fragile (see
d2eecf0b0b24d203d0f171807681dffd830d54de), among other disadvantages.

Patches 18-22 drop the hard-coded correspondence between i965 IR
opcodes and native hardware opcodes, which can fail horribly if the
back-end compiler ever needs to use more than one of the hardware
instructions with the same opcode (simultaneously or not), or if the
opcode of any instruction is reassigned.  Fixing this involves
reworking the opcode description tables to allow efficient two-way
look-up by either IR or hardware opcode.

src/intel/Makefile.sources                  |   2 +-
src/intel/Makefile.tools.am                 |   4 +
src/intel/compiler/{brw_eu.c => brw_eu.cpp} | 426 +++++++++++++++++++++++++++++------------------------------------------------------
src/intel/compiler/brw_eu.h                 | 242 +++++++++++++++++++++++++++++++++--------------
src/intel/compiler/brw_eu_compact.c         |  20 ++--
src/intel/compiler/brw_eu_defines.h         | 174 +++++++++++++++++-----------------
src/intel/compiler/brw_eu_emit.c            | 640 ++++++++++++++++++++++++++++++++++++++++++++++++-----------------------------------------------------------------------------
src/intel/compiler/brw_eu_validate.c        |   2 +-
src/intel/compiler/brw_fs.cpp               |   3 +-
src/intel/compiler/brw_fs_generator.cpp     | 110 ++++++++++------------
src/intel/compiler/brw_inst.h               |  86 ++++++++++++++++-
src/intel/compiler/brw_shader.cpp           |   2 +-
src/intel/compiler/brw_vec4_generator.cpp   | 133 +++++++++++++-------------
src/intel/compiler/meson.build              |   2 +-
src/intel/compiler/test_eu_compact.cpp      |   8 +-
src/intel/compiler/test_eu_validate.cpp     |   2 +-
16 files changed, 863 insertions(+), 993 deletions(-)

[PATCH 01/23] intel/eu: Add brw_inst.h helpers for the SEND(C) descriptor and extended descriptor.
[PATCH 02/23] intel/eu: Define helper to specify the descriptor immediates of a SEND instruction.
[PATCH 03/23] intel/eu: Use brw_set_desc() along with a helper to set common descriptor controls.
[PATCH 04/23] TRIVIAL: intel/eu: Use a local devinfo variable in brw_shader_time_add().
[PATCH 05/23] intel/eu: Provide desc immediate argument up front to brw_send_indirect_message().
[PATCH 06/23] intel/eu: Use descriptor constructors for sampler messages.
[PATCH 07/23] intel/eu: Use descriptor constructors for dataport read messages.
[PATCH 08/23] intel/eu: Use descriptor constructors for dataport write messages.
[PATCH 09/23] intel/eu: Use descriptor constructors for pixel interpolator messages.
[PATCH 10/23] intel/eu: Provide single descriptor argument to brw_send_indirect_surface_message().
[PATCH 11/23] intel/eu: Use descriptor constructors for dataport untyped surface messages.
[PATCH 12/23] intel/eu: Use descriptor constructors for dataport scattered byte surface messages.
[PATCH 13/23] intel/eu: Use descriptor constructors for dataport typed surface messages.
[PATCH 14/23] intel/eu: Get rid of the return value of brw_send_indirect_surface_message().
[PATCH 15/23] intel/eu: Get rid of the return value of brw_send_indirect_message().
[PATCH 16/23] intel/eu: Assert that the instruction is send-like in brw_set_desc_ex().
[PATCH 17/23] intel/fs: Initialize mlen for gen7 varying pull constant load messages.
[PATCH 18/23] intel/ir: Uncomment definition of several unused hardware opcodes.
[PATCH 19/23] intel/eu: Fix up various type conversions in brw_eu.c that are illegal C++.
[PATCH 20/23] intel/eu: Rework opcode description tables to allow efficient look-up by either HW or IR opcode.
[PATCH 21/23] intel/eu: Encode and decode native instruction opcodes from/to IR opcodes.
[PATCH 22/23] intel/ir: Drop hard-coded correspondence between IR and HW opcodes.
[PATCH 23/23] intel/fs: Handle FS_OPCODE_REP_FB_WRITE in implied_mrf_writes().

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