[Mesa-dev] [PATCH 5/5] nvc0, nv50/ir: add support for formatted image loads on GM107+

[Rhys Perry]

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 +--
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c                | 3 ++-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index f7ffa5627c..0fc93d221e 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -2377,12 +2377,11 @@ NVC0LoweringPass::processSurfaceCoordsGM107(TexInstruction *su)
       bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
                 TYPE_U32, bld.mkImm(0),
                 loadSuInfo32(ind, slot, NVC0_SU_INFO_ADDR, su->tex.bindless));
-   if (su->op != OP_SUSTP && su->tex.format) {
+   if (su->op != OP_SUSTP && su->tex.format && su->tex.format->components > 0) {
       const TexInstruction::ImgFormatDesc *format = su->tex.format;
       int blockwidth = format->bits[0] + format->bits[1] +
                        format->bits[2] + format->bits[3];
 
-      assert(format->components != 0);
       // make sure that the format doesn't mismatch when it's not FMT_NONE
       bld.mkCmp(OP_SET_OR, CC_NE, TYPE_U32, pred->getDef(0),
                 TYPE_U32, bld.loadImm(NULL, blockwidth / 8),
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 412c5bf54d..4a4fff92fa 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -422,7 +422,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen,
    case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
    case PIPE_SHADER_CAP_INT64_ATOMICS:
    case PIPE_SHADER_CAP_FP16:
-   case PIPE_SHADER_CAP_IMAGE_LOAD_FORMATTED:
    case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
    case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
       return 0;
@@ -440,6 +439,8 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen,
       if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
          return NVC0_MAX_IMAGES;
       return 0;
+   case PIPE_SHADER_CAP_IMAGE_LOAD_FORMATTED:
+      return class_3d >= GM107_3D_CLASS;
    default:
       NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
       return 0;
-- 
2.14.4