[Mesa-dev] [PATCH v2 3/3] anv: Disable constant buffer 0 being relative.
Rafael Antognolli
rafael.antognolli at intel.com
Fri Jun 15 23:54:17 UTC 2018
If we are on gen8+ and have context isolation support, just make that
constant buffer address be absolute, so we can use it for push UBOs too.
v2: Do not duplicate constant_buffer_0_is_relative flag (Jason)
---
src/intel/vulkan/anv_device.c | 3 ++-
src/intel/vulkan/genX_state.c | 27 +++++++++++++++++++++++++++
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index d1637f097e8..4e63f0c46fa 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -430,7 +430,8 @@ anv_physical_device_init(struct anv_physical_device *device,
device->compiler->shader_debug_log = compiler_debug_log;
device->compiler->shader_perf_log = compiler_perf_log;
device->compiler->supports_pull_constants = false;
- device->compiler->constant_buffer_0_is_relative = true;
+ device->compiler->constant_buffer_0_is_relative =
+ device->info.gen < 8 || !device->has_context_isolation;
isl_device_init(&device->isl_dev, &device->info, swizzled);
diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c
index c6e54046910..213b6061278 100644
--- a/src/intel/vulkan/genX_state.c
+++ b/src/intel/vulkan/genX_state.c
@@ -169,6 +169,33 @@ genX(init_device_state)(struct anv_device *device)
gen10_emit_wa_lri_to_cache_mode_zero(&batch);
#endif
+ /* Set the "CONSTANT_BUFFER Address Offset Disable" bit, so
+ * 3DSTATE_CONSTANT_XS buffer 0 is an absolute address.
+ *
+ * This is only safe on kernels with context isolation support.
+ */
+ if (GEN_GEN >= 8 &&
+ device->instance->physicalDevice.has_context_isolation) {
+ UNUSED uint32_t tmp_reg;
+#if GEN_GEN >= 9
+ anv_pack_struct(&tmp_reg, GENX(CS_DEBUG_MODE2),
+ .CONSTANT_BUFFERAddressOffsetDisable = true,
+ .CONSTANT_BUFFERAddressOffsetDisableMask = true);
+ anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
+ lri.RegisterOffset = GENX(CS_DEBUG_MODE2_num);
+ lri.DataDWord = tmp_reg;
+ }
+#elif GEN_GEN == 8
+ anv_pack_struct(&tmp_reg, GENX(INSTPM),
+ .CONSTANT_BUFFERAddressOffsetDisable = true,
+ .CONSTANT_BUFFERAddressOffsetDisableMask = true);
+ anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
+ lri.RegisterOffset = GENX(INSTPM_num);
+ lri.DataDWord = tmp_reg;
+ }
+#endif
+ }
+
anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe);
assert(batch.next <= batch.end);
--
2.14.3
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