[Mesa-dev] [PATCH 04/11] radeonsi: store compute local_size into tgsi_shader_info

Marek Olšák maraeo at gmail.com
Mon Jun 18 23:33:05 UTC 2018


From: Marek Olšák <marek.olsak at amd.com>

This is kinda a hack, but it's enough for the shader cache.
---
 src/gallium/drivers/radeonsi/si_compute.c    | 5 ++++-
 src/gallium/drivers/radeonsi/si_shader.c     | 3 ++-
 src/gallium/drivers/radeonsi/si_shader.h     | 6 +++---
 src/gallium/drivers/radeonsi/si_shader_nir.c | 2 +-
 4 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index f2d9cddbf03..0991775c2e5 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -102,23 +102,26 @@ static void si_create_compute_state_async(void *job, int thread_index)
 		tgsi_scan_shader(program->ir.tgsi, &sel.info);
 		sel.tokens = program->ir.tgsi;
 	} else {
 		assert(program->ir_type == PIPE_SHADER_IR_NIR);
 		sel.nir = program->ir.nir;
 
 		si_nir_scan_shader(sel.nir, &sel.info);
 		si_lower_nir(&sel);
 	}
 
+	/* Store the declared LDS size into tgsi_shader_info for the shader
+	 * cache to include it.
+	 */
+	sel.info.properties[TGSI_PROPERTY_CS_LOCAL_SIZE] = program->local_size;
 
 	sel.type = PIPE_SHADER_COMPUTE;
-	sel.local_size = program->local_size;
 	si_get_active_slot_masks(&sel.info,
 				 &program->active_const_and_shader_buffers,
 				 &program->active_samplers_and_images);
 
 	program->shader.selector = &sel;
 	program->shader.is_monolithic = true;
 	program->uses_grid_size = sel.info.uses_grid_size;
 	program->uses_block_size = sel.info.uses_block_size;
 	program->uses_bindless_samplers = sel.info.uses_bindless_samplers;
 	program->uses_bindless_images = sel.info.uses_bindless_images;
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index a0a00d722cb..e7e2a12a7b0 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2303,28 +2303,29 @@ void si_load_system_value(struct si_shader_context *ctx,
 		assert(!"unknown system value");
 		return;
 	}
 
 	ctx->system_values[index] = value;
 }
 
 void si_declare_compute_memory(struct si_shader_context *ctx)
 {
 	struct si_shader_selector *sel = ctx->shader->selector;
+	unsigned lds_size = sel->info.properties[TGSI_PROPERTY_CS_LOCAL_SIZE];
 
 	LLVMTypeRef i8p = LLVMPointerType(ctx->i8, AC_LOCAL_ADDR_SPACE);
 	LLVMValueRef var;
 
 	assert(!ctx->ac.lds);
 
 	var = LLVMAddGlobalInAddressSpace(ctx->ac.module,
-	                                  LLVMArrayType(ctx->i8, sel->local_size),
+	                                  LLVMArrayType(ctx->i8, lds_size),
 	                                  "compute_lds",
 	                                  AC_LOCAL_ADDR_SPACE);
 	LLVMSetAlignment(var, 4);
 
 	ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, var, i8p, "");
 }
 
 void si_tgsi_declare_compute_memory(struct si_shader_context *ctx,
 				    const struct tgsi_full_declaration *decl)
 {
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 9e8d5736259..e1f6b392fbe 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -270,20 +270,23 @@ enum {
 #define S_VS_STATE_LS_OUT_VERTEX_SIZE(x)	(((unsigned)(x) & 0xFF) << 24)
 #define C_VS_STATE_LS_OUT_VERTEX_SIZE		0x00FFFFFF
 
 /* SI-specific system values. */
 enum {
 	TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI = TGSI_SEMANTIC_COUNT,
 	TGSI_SEMANTIC_DEFAULT_TESSINNER_SI,
 };
 
 enum {
+	/* Use a property enum that CS wouldn't use. */
+	TGSI_PROPERTY_CS_LOCAL_SIZE = TGSI_PROPERTY_FS_COORD_ORIGIN,
+
 	/* Use a property enum that VS wouldn't use. */
 	TGSI_PROPERTY_VS_BLIT_SGPRS = TGSI_PROPERTY_FS_COORD_ORIGIN,
 
 	/* These represent the number of SGPRs the shader uses. */
 	SI_VS_BLIT_SGPRS_POS = 3,
 	SI_VS_BLIT_SGPRS_POS_COLOR = 7,
 	SI_VS_BLIT_SGPRS_POS_TEXCOORD = 9,
 };
 
 /* For VS shader key fix_fetch. */
@@ -383,23 +386,20 @@ struct si_shader_selector {
 	unsigned	enabled_streamout_buffer_mask;
 
 	/* PS parameters. */
 	unsigned	color_attr_index[2];
 	unsigned	db_shader_control;
 	/* Set 0xf or 0x0 (4 bits) per each written output.
 	 * ANDed with spi_shader_col_format.
 	 */
 	unsigned	colors_written_4bit;
 
-	/* CS parameters */
-	unsigned local_size;
-
 	uint64_t	outputs_written_before_ps; /* "get_unique_index" bits */
 	uint64_t	outputs_written;	/* "get_unique_index" bits */
 	uint32_t	patch_outputs_written;	/* "get_unique_index_patch" bits */
 
 	uint64_t	inputs_read;		/* "get_unique_index" bits */
 
 	/* bitmasks of used descriptor slots */
 	uint32_t	active_const_and_shader_buffers;
 	uint64_t	active_samplers_and_images;
 };
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index b4fba8b8812..288222cc86a 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -974,18 +974,18 @@ bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir)
 		}
 	}
 
 	ctx->abi.inputs = &ctx->inputs[0];
 	ctx->abi.load_sampler_desc = si_nir_load_sampler_desc;
 	ctx->abi.clamp_shadow_reference = true;
 
 	ctx->num_samplers = util_last_bit(info->samplers_declared);
 	ctx->num_images = util_last_bit(info->images_declared);
 
-	if (ctx->shader->selector->local_size) {
+	if (ctx->shader->selector->info.properties[TGSI_PROPERTY_CS_LOCAL_SIZE]) {
 		assert(nir->info.stage == MESA_SHADER_COMPUTE);
 		si_declare_compute_memory(ctx);
 	}
 	ac_nir_translate(&ctx->ac, &ctx->abi, nir);
 
 	return true;
 }
-- 
2.17.1



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