[Mesa-dev] [PATCH 2/4] radeonsi: handle non-clearable DCC buffers as MSAA resolve dst
Marek Olšák
maraeo at gmail.com
Thu Jun 21 01:01:56 UTC 2018
From: Marek Olšák <marek.olsak at amd.com>
This is reproducible on Stoney, but other chips may be affected too.
Cc 18.1 <mesa-stable at lists.freedesktop.org>
---
src/gallium/drivers/radeonsi/si_blit.c | 5 +++++
src/gallium/drivers/radeonsi/si_clear.c | 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index 1506d6ba8d1..23c543adbbf 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -1154,20 +1154,25 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
/* Resolving into a surface with DCC is unsupported. Since
* it's being overwritten anyway, clear it to uncompressed.
* This is still the fastest codepath even with this clear.
*/
if (vi_dcc_enabled(dst, info->dst.level)) {
/* TODO: Implement per-level DCC clears for GFX9. */
if (sctx->chip_class >= GFX9 &&
info->dst.resource->last_level != 0)
goto resolve_to_temp;
+ /* This can happen with mipmapping. */
+ if (sctx->chip_class == VI &&
+ !dst->surface.u.legacy.level[info->dst.level].dcc_fast_clear_size)
+ goto resolve_to_temp;
+
vi_dcc_clear_level(sctx, dst, info->dst.level,
0xFFFFFFFF);
dst->dirty_level_mask &= ~(1 << info->dst.level);
}
/* Resolve directly from src to dst. */
si_do_CB_resolve(sctx, info, info->dst.resource,
info->dst.level, info->dst.box.z, format);
return true;
}
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 80a4a081672..050bbf3c181 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -470,21 +470,21 @@ static void si_do_fast_color_clear(struct si_context *sctx,
}
/* Try to clear DCC first, otherwise try CMASK. */
if (vi_dcc_enabled(tex, 0)) {
uint32_t reset_value;
bool eliminate_needed;
if (sctx->screen->debug_flags & DBG(NO_DCC_CLEAR))
continue;
- /* This can only occur with MSAA. */
+ /* This can happen with mipmapping or MSAA. */
if (sctx->chip_class == VI &&
!tex->surface.u.legacy.level[level].dcc_fast_clear_size)
continue;
if (!vi_get_fast_clear_parameters(tex->buffer.b.b.format,
fb->cbufs[i]->format,
color, &reset_value,
&eliminate_needed))
continue;
--
2.17.1
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