[Mesa-dev] [PATCH 03/19] radeonsi: stop using ac_build_gather_values
Marek Olšák
maraeo at gmail.com
Fri Jun 22 22:31:54 UTC 2018
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeonsi/si_shader.c | 45 +++++++++----------
.../drivers/radeonsi/si_shader_tgsi_mem.c | 5 +--
.../drivers/radeonsi/si_shader_tgsi_setup.c | 3 +-
3 files changed, 25 insertions(+), 28 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index e10ab2ede4a..9a674ba8e26 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -16,21 +16,20 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "gallivm/lp_bld_const.h"
-#include "gallivm/lp_bld_gather.h"
#include "gallivm/lp_bld_intr.h"
#include "gallivm/lp_bld_arit.h"
#include "util/u_memory.h"
#include "util/u_string.h"
#include "tgsi/tgsi_build.h"
#include "tgsi/tgsi_util.h"
#include "tgsi/tgsi_dump.h"
#include "ac_exp_param.h"
#include "ac_shader_util.h"
@@ -1137,21 +1136,21 @@ static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMValueRef value;
if (swizzle == ~0) {
LLVMValueRef values[TGSI_NUM_CHANNELS];
for (unsigned chan = 0; chan < TGSI_NUM_CHANNELS; chan++)
values[chan] = lds_load(bld_base, type, chan, dw_addr);
- return lp_build_gather_values(&ctx->gallivm, values,
+ return ac_build_gather_values(&ctx->ac, values,
TGSI_NUM_CHANNELS);
}
/* Split 64-bit loads. */
if (llvm_type_is_64bit(ctx, type)) {
LLVMValueRef lo, hi;
lo = lds_load(bld_base, ctx->i32, swizzle, dw_addr);
hi = lds_load(bld_base, ctx->i32, swizzle + 1, dw_addr);
return si_llvm_emit_fetch_64bit(bld_base, type, lo, hi);
@@ -1481,21 +1480,21 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
LLVMBuildStore(ctx->ac.builder, value, /* outer */
ctx->invoc0_tess_factors[chan_index]);
} else if (chan_index < 2) {
LLVMBuildStore(ctx->ac.builder, value, /* inner */
ctx->invoc0_tess_factors[4 + chan_index]);
}
}
}
if (reg->Register.WriteMask == 0xF && !is_tess_factor) {
- LLVMValueRef value = lp_build_gather_values(&ctx->gallivm,
+ LLVMValueRef value = ac_build_gather_values(&ctx->ac,
values, 4);
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, buf_addr,
base, 0, 1, 0, true, false);
}
}
static void si_nir_store_output_tcs(struct ac_shader_abi *abi,
const struct nir_variable *var,
LLVMValueRef vertex_index,
LLVMValueRef param_index,
@@ -1597,21 +1596,21 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi,
LLVMBuildStore(ctx->ac.builder, value, /* outer */
ctx->invoc0_tess_factors[chan]);
} else if (chan < 2) {
LLVMBuildStore(ctx->ac.builder, value, /* inner */
ctx->invoc0_tess_factors[4 + chan]);
}
}
}
if (writemask == 0xF && !is_tess_factor) {
- LLVMValueRef value = lp_build_gather_values(&ctx->gallivm,
+ LLVMValueRef value = ac_build_gather_values(&ctx->ac,
values, 4);
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, addr,
base, 0, 1, 0, true, false);
}
}
LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
unsigned input_index,
unsigned vtx_offset_param,
LLVMTypeRef type,
@@ -1658,21 +1657,21 @@ LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
}
/* GFX6: input load from the ESGS ring in memory. */
if (swizzle == ~0) {
LLVMValueRef values[TGSI_NUM_CHANNELS];
unsigned chan;
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
values[chan] = si_llvm_load_input_gs(abi, input_index, vtx_offset_param,
type, chan);
}
- return lp_build_gather_values(&ctx->gallivm, values,
+ return ac_build_gather_values(&ctx->ac, values,
TGSI_NUM_CHANNELS);
}
/* Get the vertex offset parameter on GFX6. */
LLVMValueRef gs_vtx_offset = ctx->gs_vtx_offset[vtx_offset_param];
vtx_offset = lp_build_mul_imm(uint, gs_vtx_offset, 4);
soffset = LLVMConstInt(ctx->i32, (param * 4 + swizzle) * 256, 0);
@@ -1972,21 +1971,21 @@ static LLVMValueRef get_block_size(struct ac_shader_abi *abi)
if (properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] != 0) {
unsigned sizes[3] = {
properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH],
properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT],
properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH]
};
for (i = 0; i < 3; ++i)
values[i] = LLVMConstInt(ctx->i32, sizes[i], 0);
- result = lp_build_gather_values(&ctx->gallivm, values, 3);
+ result = ac_build_gather_values(&ctx->ac, values, 3);
} else {
result = LLVMGetParam(ctx->main_fn, ctx->param_block_size);
}
return result;
}
/**
* Load a dword from a constant buffer.
*/
@@ -2010,21 +2009,21 @@ static LLVMValueRef load_sample_position(struct ac_shader_abi *abi, LLVMValueRef
LLVMValueRef offset0 = lp_build_mul_imm(uint_bld, sample_id, 8);
LLVMValueRef offset1 = LLVMBuildAdd(ctx->ac.builder, offset0, LLVMConstInt(ctx->i32, 4, 0), "");
LLVMValueRef pos[4] = {
buffer_load_const(ctx, resource, offset0),
buffer_load_const(ctx, resource, offset1),
LLVMConstReal(ctx->f32, 0),
LLVMConstReal(ctx->f32, 0)
};
- return lp_build_gather_values(&ctx->gallivm, pos, 4);
+ return ac_build_gather_values(&ctx->ac, pos, 4);
}
static LLVMValueRef load_sample_mask_in(struct ac_shader_abi *abi)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
return ac_to_integer(&ctx->ac, abi->sample_coverage);
}
static LLVMValueRef si_load_tess_coord(struct ac_shader_abi *abi)
{
@@ -2037,21 +2036,21 @@ static LLVMValueRef si_load_tess_coord(struct ac_shader_abi *abi)
ctx->ac.f32_0,
ctx->ac.f32_0
};
/* For triangles, the vector should be (u, v, 1-u-v). */
if (ctx->shader->selector->info.properties[TGSI_PROPERTY_TES_PRIM_MODE] ==
PIPE_PRIM_TRIANGLES)
coord[2] = lp_build_sub(bld, ctx->ac.f32_1,
lp_build_add(bld, coord[0], coord[1]));
- return lp_build_gather_values(&ctx->gallivm, coord, 4);
+ return ac_build_gather_values(&ctx->ac, coord, 4);
}
static LLVMValueRef load_tess_level(struct si_shader_context *ctx,
unsigned semantic_name)
{
LLVMValueRef base, addr;
int param = si_shader_io_get_unique_index_patch(semantic_name, 0);
base = LLVMGetParam(ctx->main_fn, ctx->param_tcs_offchip_offset);
@@ -2144,21 +2143,21 @@ void si_load_system_value(struct si_shader_context *ctx,
case TGSI_SEMANTIC_POSITION:
{
LLVMValueRef pos[4] = {
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_X_FLOAT),
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Y_FLOAT),
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Z_FLOAT),
lp_build_emit_llvm_unary(&ctx->bld_base, TGSI_OPCODE_RCP,
LLVMGetParam(ctx->main_fn,
SI_PARAM_POS_W_FLOAT)),
};
- value = lp_build_gather_values(&ctx->gallivm, pos, 4);
+ value = ac_build_gather_values(&ctx->ac, pos, 4);
break;
}
case TGSI_SEMANTIC_FACE:
value = ctx->abi.front_face;
break;
case TGSI_SEMANTIC_SAMPLEID:
value = si_get_sample_id(ctx);
break;
@@ -2167,21 +2166,21 @@ void si_load_system_value(struct si_shader_context *ctx,
LLVMValueRef pos[4] = {
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_X_FLOAT),
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Y_FLOAT),
LLVMConstReal(ctx->f32, 0),
LLVMConstReal(ctx->f32, 0)
};
pos[0] = lp_build_emit_llvm_unary(&ctx->bld_base,
TGSI_OPCODE_FRC, pos[0]);
pos[1] = lp_build_emit_llvm_unary(&ctx->bld_base,
TGSI_OPCODE_FRC, pos[1]);
- value = lp_build_gather_values(&ctx->gallivm, pos, 4);
+ value = ac_build_gather_values(&ctx->ac, pos, 4);
break;
}
case TGSI_SEMANTIC_SAMPLEMASK:
/* This can only occur with the OpenGL Core profile, which
* doesn't support smoothing.
*/
value = LLVMGetParam(ctx->main_fn, SI_PARAM_SAMPLE_COVERAGE);
break;
@@ -2205,21 +2204,21 @@ void si_load_system_value(struct si_shader_context *ctx,
int i, offset;
slot = LLVMConstInt(ctx->i32, SI_HS_CONST_DEFAULT_TESS_LEVELS, 0);
buf = LLVMGetParam(ctx->main_fn, ctx->param_rw_buffers);
buf = ac_build_load_to_sgpr(&ctx->ac, buf, slot);
offset = decl->Semantic.Name == TGSI_SEMANTIC_DEFAULT_TESSINNER_SI ? 4 : 0;
for (i = 0; i < 4; i++)
val[i] = buffer_load_const(ctx, buf,
LLVMConstInt(ctx->i32, (offset + i) * 4, 0));
- value = lp_build_gather_values(&ctx->gallivm, val, 4);
+ value = ac_build_gather_values(&ctx->ac, val, 4);
break;
}
case TGSI_SEMANTIC_PRIMID:
value = get_primitive_id(ctx, 0);
break;
case TGSI_SEMANTIC_GRID_SIZE:
value = ctx->abi.num_work_groups;
break;
@@ -2231,21 +2230,21 @@ void si_load_system_value(struct si_shader_context *ctx,
case TGSI_SEMANTIC_BLOCK_ID:
{
LLVMValueRef values[3];
for (int i = 0; i < 3; i++) {
values[i] = ctx->i32_0;
if (ctx->abi.workgroup_ids[i]) {
values[i] = ctx->abi.workgroup_ids[i];
}
}
- value = lp_build_gather_values(&ctx->gallivm, values, 3);
+ value = ac_build_gather_values(&ctx->ac, values, 3);
break;
}
case TGSI_SEMANTIC_THREAD_ID:
value = ctx->abi.local_invocation_ids;
break;
case TGSI_SEMANTIC_HELPER_INVOCATION:
value = lp_build_intrinsic(ctx->ac.builder,
"llvm.amdgcn.ps.live",
@@ -2429,21 +2428,21 @@ static LLVMValueRef fetch_constant(
unsigned buf, idx;
LLVMValueRef addr, bufp;
if (swizzle == LP_CHAN_ALL) {
unsigned chan;
LLVMValueRef values[4];
for (chan = 0; chan < TGSI_NUM_CHANNELS; ++chan)
values[chan] = fetch_constant(bld_base, reg, type, chan);
- return lp_build_gather_values(&ctx->gallivm, values, 4);
+ return ac_build_gather_values(&ctx->ac, values, 4);
}
/* Split 64-bit loads. */
if (tgsi_type_is_64bit(type)) {
LLVMValueRef lo, hi;
lo = fetch_constant(bld_base, reg, TGSI_TYPE_UNSIGNED, swizzle);
hi = fetch_constant(bld_base, reg, TGSI_TYPE_UNSIGNED, swizzle + 1);
return si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
lo, hi);
@@ -3215,25 +3214,25 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
if (shader->key.part.tcs.epilog.prim_mode == PIPE_PRIM_LINES) {
/* For isolines, the hardware expects tess factors in the
* reverse order from what GLSL / TGSI specify.
*/
LLVMValueRef tmp = out[0];
out[0] = out[1];
out[1] = tmp;
}
/* Convert the outputs to vectors for stores. */
- vec0 = lp_build_gather_values(&ctx->gallivm, out, MIN2(stride, 4));
+ vec0 = ac_build_gather_values(&ctx->ac, out, MIN2(stride, 4));
vec1 = NULL;
if (stride > 4)
- vec1 = lp_build_gather_values(&ctx->gallivm, out+4, stride - 4);
+ vec1 = ac_build_gather_values(&ctx->ac, out+4, stride - 4);
/* Get the buffer. */
buffer = get_tess_ring_descriptor(ctx, TCS_FACTOR_RING);
/* Get the offset. */
tf_base = LLVMGetParam(ctx->main_fn,
ctx->param_tcs_factor_offset);
byteoffset = LLVMBuildMul(ctx->ac.builder, rel_patch_id,
LLVMConstInt(ctx->i32, 4 * stride, 0), "");
@@ -3270,34 +3269,34 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
unsigned param_outer, param_inner;
buf = get_tess_ring_descriptor(ctx, TESS_OFFCHIP_RING_TCS);
base = LLVMGetParam(ctx->main_fn, ctx->param_tcs_offchip_offset);
param_outer = si_shader_io_get_unique_index_patch(
TGSI_SEMANTIC_TESSOUTER, 0);
tf_outer_offset = get_tcs_tes_buffer_address(ctx, rel_patch_id, NULL,
LLVMConstInt(ctx->i32, param_outer, 0));
- outer_vec = lp_build_gather_values(&ctx->gallivm, outer,
+ outer_vec = ac_build_gather_values(&ctx->ac, outer,
util_next_power_of_two(outer_comps));
ac_build_buffer_store_dword(&ctx->ac, buf, outer_vec,
outer_comps, tf_outer_offset,
base, 0, 1, 0, true, false);
if (inner_comps) {
param_inner = si_shader_io_get_unique_index_patch(
TGSI_SEMANTIC_TESSINNER, 0);
tf_inner_offset = get_tcs_tes_buffer_address(ctx, rel_patch_id, NULL,
LLVMConstInt(ctx->i32, param_inner, 0));
inner_vec = inner_comps == 1 ? inner[0] :
- lp_build_gather_values(&ctx->gallivm, inner, inner_comps);
+ ac_build_gather_values(&ctx->ac, inner, inner_comps);
ac_build_buffer_store_dword(&ctx->ac, buf, inner_vec,
inner_comps, tf_inner_offset,
base, 0, 1, 0, true, false);
}
}
lp_build_endif(&if_ctx);
}
static LLVMValueRef
@@ -4025,21 +4024,21 @@ static LLVMValueRef si_llvm_emit_ddxy_interp(
LLVMValueRef result[4], a;
unsigned i;
for (i = 0; i < 2; i++) {
a = LLVMBuildExtractElement(ctx->ac.builder, interp_ij,
LLVMConstInt(ctx->i32, i, 0), "");
result[i] = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_DDX, a);
result[2+i] = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_DDY, a);
}
- return lp_build_gather_values(&ctx->gallivm, result, 4);
+ return ac_build_gather_values(&ctx->ac, result, 4);
}
static void interp_fetch_args(
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
const struct tgsi_full_instruction *inst = emit_data->inst;
if (inst->Instruction.Opcode == TGSI_OPCODE_INTERP_OFFSET) {
@@ -4078,21 +4077,21 @@ static void interp_fetch_args(
* sample position doesn't work.
*/
if (ctx->shader->key.mono.u.ps.interpolate_at_sample_force_center) {
LLVMValueRef center[4] = {
LLVMConstReal(ctx->f32, 0.5),
LLVMConstReal(ctx->f32, 0.5),
ctx->ac.f32_0,
ctx->ac.f32_0,
};
- sample_position = lp_build_gather_values(&ctx->gallivm, center, 4);
+ sample_position = ac_build_gather_values(&ctx->ac, center, 4);
} else {
sample_position = load_sample_position(&ctx->abi, sample_id);
}
emit_data->args[0] = LLVMBuildExtractElement(ctx->ac.builder,
sample_position,
ctx->i32_0, "");
emit_data->args[0] = LLVMBuildFSub(ctx->ac.builder, emit_data->args[0], halfval, "");
emit_data->args[1] = LLVMBuildExtractElement(ctx->ac.builder,
@@ -4186,21 +4185,21 @@ static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
interp_el = ac_to_float(&ctx->ac, interp_el);
temp1 = LLVMBuildFMul(ctx->ac.builder, ddx_el, emit_data->args[0], "");
temp1 = LLVMBuildFAdd(ctx->ac.builder, temp1, interp_el, "");
temp2 = LLVMBuildFMul(ctx->ac.builder, ddy_el, emit_data->args[1], "");
ij_out[i] = LLVMBuildFAdd(ctx->ac.builder, temp2, temp1, "");
}
- interp_param = lp_build_gather_values(&ctx->gallivm, ij_out, 2);
+ interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
}
if (interp_param)
interp_param = ac_to_float(&ctx->ac, interp_param);
for (chan = 0; chan < 4; chan++) {
LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->f32, input_array_size));
unsigned schan = tgsi_util_get_full_src_register_swizzle(&inst->Src[0], chan);
for (unsigned idx = 0; idx < input_array_size; ++idx) {
@@ -6688,21 +6687,21 @@ static void si_build_wrapper_function(struct si_shader_context *ctx,
/* Skip returned SGPRs the current part doesn't
* declare on the input. */
out_idx = num_out_sgpr;
}
assert(out_idx + param_size <= (is_sgpr ? num_out_sgpr : num_out));
if (param_size == 1)
arg = out[out_idx];
else
- arg = lp_build_gather_values(&ctx->gallivm, &out[out_idx], param_size);
+ arg = ac_build_gather_values(&ctx->ac, &out[out_idx], param_size);
if (LLVMTypeOf(arg) != param_type) {
if (LLVMGetTypeKind(param_type) == LLVMPointerTypeKind) {
if (LLVMGetPointerAddressSpace(param_type) ==
AC_CONST_32BIT_ADDR_SPACE) {
arg = LLVMBuildBitCast(builder, arg, ctx->i32, "");
arg = LLVMBuildIntToPtr(builder, arg, param_type, "");
} else {
arg = LLVMBuildBitCast(builder, arg, ctx->i64, "");
arg = LLVMBuildIntToPtr(builder, arg, param_type, "");
@@ -7190,21 +7189,21 @@ static LLVMValueRef si_prolog_get_rw_buffers(struct si_shader_context *ctx)
if (HAVE_32BIT_POINTERS) {
ptr[0] = LLVMGetParam(ctx->main_fn, (is_merged_shader ? 8 : 0) + SI_SGPR_RW_BUFFERS);
list = LLVMBuildIntToPtr(ctx->ac.builder, ptr[0],
ac_array_in_const32_addr_space(ctx->v4i32), "");
return list;
}
/* Get the pointer to rw buffers. */
ptr[0] = LLVMGetParam(ctx->main_fn, (is_merged_shader ? 8 : 0) + SI_SGPR_RW_BUFFERS);
ptr[1] = LLVMGetParam(ctx->main_fn, (is_merged_shader ? 8 : 0) + SI_SGPR_RW_BUFFERS + 1);
- list = lp_build_gather_values(&ctx->gallivm, ptr, 2);
+ list = ac_build_gather_values(&ctx->ac, ptr, 2);
list = LLVMBuildBitCast(ctx->ac.builder, list, ctx->i64, "");
list = LLVMBuildIntToPtr(ctx->ac.builder, list,
ac_array_in_const_addr_space(ctx->v4i32), "");
return list;
}
/**
* Build the vertex shader prolog function.
*
* The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
@@ -7722,21 +7721,21 @@ static void si_build_ps_prolog_function(struct si_shader_context *ctx,
/* If the interpolation qualifier is not CONSTANT (-1). */
if (key->ps_prolog.color_interp_vgpr_index[i] != -1) {
unsigned interp_vgpr = key->ps_prolog.num_input_sgprs +
key->ps_prolog.color_interp_vgpr_index[i];
/* Get the (i,j) updated by bc_optimize handling. */
interp[0] = LLVMBuildExtractValue(ctx->ac.builder, ret,
interp_vgpr, "");
interp[1] = LLVMBuildExtractValue(ctx->ac.builder, ret,
interp_vgpr + 1, "");
- interp_ij = lp_build_gather_values(&ctx->gallivm, interp, 2);
+ interp_ij = ac_build_gather_values(&ctx->ac, interp, 2);
}
/* Use the absolute location of the input. */
prim_mask = LLVMGetParam(func, SI_PS_NUM_USER_SGPR);
if (key->ps_prolog.states.color_two_side) {
face = LLVMGetParam(func, face_vgpr);
face = ac_to_integer(&ctx->ac, face);
}
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index 59f2dbf0d60..ef561d409d7 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -19,21 +19,20 @@
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "si_shader_internal.h"
#include "si_pipe.h"
#include "sid.h"
#include "gallivm/lp_bld_arit.h"
-#include "gallivm/lp_bld_gather.h"
#include "gallivm/lp_bld_intr.h"
#include "tgsi/tgsi_build.h"
#include "tgsi/tgsi_util.h"
#include "ac_llvm_util.h"
static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data);
static const struct lp_build_tgsi_action tex_action;
@@ -452,21 +451,21 @@ static void load_emit_memory(
for (chan = 0; chan < 4; ++chan) {
if (!(writemask & (1 << chan))) {
channels[chan] = LLVMGetUndef(ctx->f32);
continue;
}
index = LLVMConstInt(ctx->i32, chan, 0);
derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
channels[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
}
- emit_data->output[emit_data->chan] = lp_build_gather_values(&ctx->gallivm, channels, 4);
+ emit_data->output[emit_data->chan] = ac_build_gather_values(&ctx->ac, channels, 4);
}
/**
* Return true if the memory accessed by a LOAD or STORE instruction is
* read-only or write-only, respectively.
*
* \param shader_buffers_reverse_access_mask
* For LOAD, set this to (store | atomic) slot usage in the shader.
* For STORE, set this to (load | atomic) slot usage in the shader.
* \param images_reverse_access_mask Same as above, but for images.
@@ -598,21 +597,21 @@ static void store_fetch_args(
LLVMValueRef chans[4];
LLVMValueRef data;
LLVMValueRef rsrc;
unsigned chan;
emit_data->dst_type = ctx->voidt;
for (chan = 0; chan < 4; ++chan) {
chans[chan] = lp_build_emit_fetch(bld_base, inst, 1, chan);
}
- data = lp_build_gather_values(&ctx->gallivm, chans, 4);
+ data = ac_build_gather_values(&ctx->ac, chans, 4);
emit_data->args[emit_data->arg_count++] = data;
memory = tgsi_full_src_register_from_dst(&inst->Dst[0]);
if (inst->Dst[0].Register.File == TGSI_FILE_BUFFER) {
LLVMValueRef offset;
LLVMValueRef tmp;
rsrc = shader_buffer_fetch_rsrc(ctx, &memory, false);
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index 63710b1180c..4fd44549f7a 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -18,21 +18,20 @@
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "si_shader_internal.h"
#include "si_pipe.h"
#include "ac_llvm_util.h"
-#include "gallivm/lp_bld_gather.h"
#include "util/u_memory.h"
enum si_llvm_calling_convention {
RADEON_LLVM_AMDGPU_VS = 87,
RADEON_LLVM_AMDGPU_GS = 88,
RADEON_LLVM_AMDGPU_PS = 89,
RADEON_LLVM_AMDGPU_CS = 90,
RADEON_LLVM_AMDGPU_HS = 93,
};
@@ -489,21 +488,21 @@ LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMBuilderRef builder = ctx->ac.builder;
LLVMValueRef result = NULL, ptr, ptr2;
if (swizzle == ~0) {
LLVMValueRef values[TGSI_NUM_CHANNELS];
unsigned chan;
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
values[chan] = si_llvm_emit_fetch(bld_base, reg, type, chan);
}
- return lp_build_gather_values(&ctx->gallivm, values,
+ return ac_build_gather_values(&ctx->ac, values,
TGSI_NUM_CHANNELS);
}
if (reg->Register.Indirect) {
LLVMValueRef load = load_value_from_array(bld_base, reg->Register.File, type,
swizzle, reg->Register.Index, ®->Indirect);
return bitcast(bld_base, type, load);
}
switch(reg->Register.File) {
--
2.17.1
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