[Mesa-dev] [PATCH 08/19] radeonsi: stop using lp_build_alloc

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_shader.c      |  7 +++----
 .../drivers/radeonsi/si_shader_tgsi_setup.c   | 19 ++++++++-----------
 2 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 9248c4c49b6..e7706f796f3 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -6160,35 +6160,34 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx)
 			 * reach s_endpgm.
 			 */
 			si_llvm_emit_barrier(NULL, bld_base, NULL);
 		}
 	}
 
 	if (ctx->type == PIPE_SHADER_TESS_CTRL &&
 	    sel->tcs_info.tessfactors_are_def_in_all_invocs) {
 		for (unsigned i = 0; i < 6; i++) {
 			ctx->invoc0_tess_factors[i] =
-				lp_build_alloca_undef(&ctx->gallivm, ctx->i32, "");
+				ac_build_alloca_undef(&ctx->ac, ctx->i32, "");
 		}
 	}
 
 	if (ctx->type == PIPE_SHADER_GEOMETRY) {
 		int i;
 		for (i = 0; i < 4; i++) {
 			ctx->gs_next_vertex[i] =
-				lp_build_alloca(&ctx->gallivm,
-						ctx->i32, "");
+				ac_build_alloca(&ctx->ac, ctx->i32, "");
 		}
 	}
 
 	if (sel->force_correct_derivs_after_kill) {
-		ctx->postponed_kill = lp_build_alloca_undef(&ctx->gallivm, ctx->i1, "");
+		ctx->postponed_kill = ac_build_alloca_undef(&ctx->ac, ctx->i1, "");
 		/* true = don't kill. */
 		LLVMBuildStore(ctx->ac.builder, LLVMConstInt(ctx->i1, 1, 0),
 			       ctx->postponed_kill);
 	}
 
 	if (sel->tokens) {
 		if (!lp_build_tgsi_llvm(bld_base, sel->tokens)) {
 			fprintf(stderr, "Failed to translate shader from TGSI to LLVM\n");
 			return false;
 		}
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index 4fd44549f7a..de3a6cbf0d7 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -618,23 +618,22 @@ static void emit_declaration(struct lp_build_tgsi_context *bld_base,
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	LLVMBuilderRef builder = ctx->ac.builder;
 	unsigned first, last, i;
 	switch(decl->Declaration.File) {
 	case TGSI_FILE_ADDRESS:
 	{
 		 unsigned idx;
 		for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) {
 			unsigned chan;
 			for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
-				 ctx->addrs[idx][chan] = lp_build_alloca_undef(
-					&ctx->gallivm,
-					ctx->i32, "");
+				 ctx->addrs[idx][chan] = ac_build_alloca_undef(
+					&ctx->ac, ctx->i32, "");
 			}
 		}
 		break;
 	}
 
 	case TGSI_FILE_TEMPORARY:
 	{
 		char name[18] = "";
 		LLVMValueRef array_alloca = NULL;
 		unsigned decl_size;
@@ -665,59 +664,58 @@ static void emit_declaration(struct lp_build_tgsi_context *bld_base,
 			 * array with up to 4 * 16 = 64 elements could be
 			 * handled this way, but whether that's a good idea
 			 * depends on VGPR register pressure elsewhere.
 			 *
 			 * FIXME: We shouldn't need to have the non-alloca
 			 * code path for arrays. LLVM should be smart enough to
 			 * promote allocas into registers when profitable.
 			 */
 			if (array_size > 16 ||
 			    !ctx->screen->llvm_has_working_vgpr_indexing) {
-				array_alloca = lp_build_alloca_undef(&ctx->gallivm,
+				array_alloca = ac_build_alloca_undef(&ctx->ac,
 					LLVMArrayType(ctx->f32,
 						      array_size), "array");
 				ctx->temp_array_allocas[id] = array_alloca;
 			}
 		}
 
 		if (!ctx->temps_count) {
 			ctx->temps_count = bld_base->info->file_max[TGSI_FILE_TEMPORARY] + 1;
 			ctx->temps = MALLOC(TGSI_NUM_CHANNELS * ctx->temps_count * sizeof(LLVMValueRef));
 		}
 		if (!array_alloca) {
 			for (i = 0; i < decl_size; ++i) {
 #ifdef DEBUG
 				snprintf(name, sizeof(name), "TEMP%d.%c",
 					 first + i / 4, "xyzw"[i % 4]);
 #endif
 				ctx->temps[first * TGSI_NUM_CHANNELS + i] =
-					lp_build_alloca_undef(&ctx->gallivm,
+					ac_build_alloca_undef(&ctx->ac,
 							      ctx->f32,
 							      name);
 			}
 		} else {
 			LLVMValueRef idxs[2] = {
 				ctx->i32_0,
 				NULL
 			};
 			unsigned j = 0;
 
 			if (writemask != TGSI_WRITEMASK_XYZW &&
 			    !ctx->undef_alloca) {
 				/* Create a dummy alloca. We use it so that we
 				 * have a pointer that is safe to load from if
 				 * a shader ever reads from a channel that
 				 * it never writes to.
 				 */
-				ctx->undef_alloca = lp_build_alloca_undef(
-					&ctx->gallivm,
-					ctx->f32, "undef");
+				ctx->undef_alloca = ac_build_alloca_undef(
+					&ctx->ac, ctx->f32, "undef");
 			}
 
 			for (i = 0; i < decl_size; ++i) {
 				LLVMValueRef ptr;
 				if (writemask & (1 << (i % 4))) {
 #ifdef DEBUG
 					snprintf(name, sizeof(name), "TEMP%d.%c",
 						 first + i / 4, "xyzw"[i % 4]);
 #endif
 					idxs[1] = LLVMConstInt(ctx->i32, j, 0);
@@ -767,23 +765,22 @@ static void emit_declaration(struct lp_build_tgsi_context *bld_base,
 		for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) {
 			unsigned chan;
 			assert(idx < RADEON_LLVM_MAX_OUTPUTS);
 			if (ctx->outputs[idx][0])
 				continue;
 			for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
 #ifdef DEBUG
 				snprintf(name, sizeof(name), "OUT%d.%c",
 					 idx, "xyzw"[chan % 4]);
 #endif
-				ctx->outputs[idx][chan] = lp_build_alloca_undef(
-					&ctx->gallivm,
-					ctx->f32, name);
+				ctx->outputs[idx][chan] = ac_build_alloca_undef(
+					&ctx->ac, ctx->f32, name);
 			}
 		}
 		break;
 	}
 
 	case TGSI_FILE_MEMORY:
 		si_tgsi_declare_compute_memory(ctx, decl);
 		break;
 
 	default:
-- 
2.17.1