[Mesa-dev] [PATCH 06/19] radeonsi: stop using lp_bld_intr.h
Marek Olšák
maraeo at gmail.com
Fri Jun 22 22:31:57 UTC 2018
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeonsi/si_shader.c | 34 ++++++++++---------
.../drivers/radeonsi/si_shader_tgsi_alu.c | 10 +++---
.../drivers/radeonsi/si_shader_tgsi_mem.c | 15 ++++----
3 files changed, 29 insertions(+), 30 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 9f2d323459d..bac79d7f999 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -15,22 +15,20 @@
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
-#include "gallivm/lp_bld_const.h"
-#include "gallivm/lp_bld_intr.h"
#include "util/u_memory.h"
#include "util/u_string.h"
#include "tgsi/tgsi_build.h"
#include "tgsi/tgsi_util.h"
#include "tgsi/tgsi_dump.h"
#include "ac_exp_param.h"
#include "ac_shader_util.h"
#include "ac_llvm_util.h"
#include "si_shader_internal.h"
@@ -2236,24 +2234,24 @@ void si_load_system_value(struct si_shader_context *ctx,
}
value = ac_build_gather_values(&ctx->ac, values, 3);
break;
}
case TGSI_SEMANTIC_THREAD_ID:
value = ctx->abi.local_invocation_ids;
break;
case TGSI_SEMANTIC_HELPER_INVOCATION:
- value = lp_build_intrinsic(ctx->ac.builder,
+ value = ac_build_intrinsic(&ctx->ac,
"llvm.amdgcn.ps.live",
ctx->i1, NULL, 0,
- LP_FUNC_ATTR_READNONE);
+ AC_FUNC_ATTR_READNONE);
value = LLVMBuildNot(ctx->ac.builder, value, "");
value = LLVMBuildSExt(ctx->ac.builder, value, ctx->i32, "");
break;
case TGSI_SEMANTIC_SUBGROUP_SIZE:
value = LLVMConstInt(ctx->i32, 64, 0);
break;
case TGSI_SEMANTIC_SUBGROUP_INVOCATION:
value = ac_get_thread_id(&ctx->ac);
@@ -2658,23 +2656,23 @@ static LLVMValueRef si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context *
unsigned samplemask_param)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMValueRef coverage;
/* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
coverage = LLVMGetParam(ctx->main_fn,
samplemask_param);
coverage = ac_to_integer(&ctx->ac, coverage);
- coverage = lp_build_intrinsic(ctx->ac.builder, "llvm.ctpop.i32",
+ coverage = ac_build_intrinsic(&ctx->ac, "llvm.ctpop.i32",
ctx->i32,
- &coverage, 1, LP_FUNC_ATTR_READNONE);
+ &coverage, 1, AC_FUNC_ATTR_READNONE);
coverage = LLVMBuildUIToFP(ctx->ac.builder, coverage,
ctx->f32, "");
coverage = LLVMBuildFMul(ctx->ac.builder, coverage,
LLVMConstReal(ctx->f32,
1.0 / SI_NUM_SMOOTH_AA_SAMPLES), "");
return LLVMBuildFMul(ctx->ac.builder, alpha, coverage, "");
}
@@ -4443,23 +4441,23 @@ static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
/* SI only (thanks to a hw bug workaround):
* The real barrier instruction isn’t needed, because an entire patch
* always fits into a single wave.
*/
if (ctx->screen->info.chip_class == SI &&
ctx->type == PIPE_SHADER_TESS_CTRL) {
ac_build_waitcnt(&ctx->ac, LGKM_CNT & VM_CNT);
return;
}
- lp_build_intrinsic(ctx->ac.builder,
+ ac_build_intrinsic(&ctx->ac,
"llvm.amdgcn.s.barrier",
- ctx->voidt, NULL, 0, LP_FUNC_ATTR_CONVERGENT);
+ ctx->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
}
static const struct lp_build_tgsi_action interp_action = {
.fetch_args = interp_fetch_args,
.emit = build_interp_intrinsic,
};
static void si_create_function(struct si_shader_context *ctx,
const char *name,
LLVMTypeRef *returns, unsigned num_returns,
@@ -4475,24 +4473,26 @@ static void si_create_function(struct si_shader_context *ctx,
for (i = 0; i < fninfo->num_sgpr_params; ++i) {
LLVMValueRef P = LLVMGetParam(ctx->main_fn, i);
/* The combination of:
* - noalias
* - dereferenceable
* - invariant.load
* allows the optimization passes to move loads and reduces
* SGPR spilling significantly.
*/
- lp_add_function_attr(ctx->main_fn, i + 1, LP_FUNC_ATTR_INREG);
+ ac_add_function_attr(ctx->ac.context, ctx->main_fn, i + 1,
+ AC_FUNC_ATTR_INREG);
if (LLVMGetTypeKind(LLVMTypeOf(P)) == LLVMPointerTypeKind) {
- lp_add_function_attr(ctx->main_fn, i + 1, LP_FUNC_ATTR_NOALIAS);
+ ac_add_function_attr(ctx->ac.context, ctx->main_fn, i + 1,
+ AC_FUNC_ATTR_NOALIAS);
ac_add_attr_dereferenceable(P, UINT64_MAX);
}
}
for (i = 0; i < fninfo->num_params; ++i) {
if (fninfo->assign[i])
*fninfo->assign[i] = LLVMGetParam(ctx->main_fn, i);
}
if (ctx->screen->info.address32_hi) {
@@ -6024,23 +6024,23 @@ static void si_optimize_vs_outputs(struct si_shader_context *ctx)
&shader->info.nr_param_exports);
}
static void si_init_exec_from_input(struct si_shader_context *ctx,
unsigned param, unsigned bitoffset)
{
LLVMValueRef args[] = {
LLVMGetParam(ctx->main_fn, param),
LLVMConstInt(ctx->i32, bitoffset, 0),
};
- lp_build_intrinsic(ctx->ac.builder,
+ ac_build_intrinsic(&ctx->ac,
"llvm.amdgcn.init.exec.from.input",
- ctx->voidt, args, 2, LP_FUNC_ATTR_CONVERGENT);
+ ctx->voidt, args, 2, AC_FUNC_ATTR_CONVERGENT);
}
static bool si_vs_needs_prolog(const struct si_shader_selector *sel,
const struct si_vs_prolog_bits *key)
{
/* VGPR initialization fixup for Vega10 and Raven is always done in the
* VS prolog. */
return sel->vs_needs_prolog || key->ls_vgpr_fix;
}
@@ -6541,21 +6541,22 @@ static void si_build_wrapper_function(struct si_shader_context *ctx,
unsigned num_out, initial_num_out;
MAYBE_UNUSED unsigned num_out_sgpr; /* used in debug checks */
MAYBE_UNUSED unsigned initial_num_out_sgpr; /* used in debug checks */
unsigned num_sgprs, num_vgprs;
unsigned gprs;
struct lp_build_if_state if_state;
si_init_function_info(&fninfo);
for (unsigned i = 0; i < num_parts; ++i) {
- lp_add_function_attr(parts[i], -1, LP_FUNC_ATTR_ALWAYSINLINE);
+ ac_add_function_attr(ctx->ac.context, parts[i], -1,
+ AC_FUNC_ATTR_ALWAYSINLINE);
LLVMSetLinkage(parts[i], LLVMPrivateLinkage);
}
/* The parameters of the wrapper function correspond to those of the
* first part in terms of SGPRs and VGPRs, but we use the types of the
* main part to get the right types. This is relevant for the
* dereferenceable attribute on descriptor table pointers.
*/
num_sgprs = 0;
num_vgprs = 0;
@@ -6668,23 +6669,24 @@ static void si_build_wrapper_function(struct si_shader_context *ctx,
LLVMTypeRef param_type;
bool is_sgpr;
unsigned param_size;
LLVMValueRef arg = NULL;
param = LLVMGetParam(parts[part], param_idx);
param_type = LLVMTypeOf(param);
param_size = ac_get_type_size(param_type) / 4;
is_sgpr = ac_is_sgpr_param(param);
- if (is_sgpr)
- lp_add_function_attr(parts[part], param_idx + 1, LP_FUNC_ATTR_INREG);
- else if (out_idx < num_out_sgpr) {
+ if (is_sgpr) {
+ ac_add_function_attr(ctx->ac.context, parts[part],
+ param_idx + 1, AC_FUNC_ATTR_INREG);
+ } else if (out_idx < num_out_sgpr) {
/* Skip returned SGPRs the current part doesn't
* declare on the input. */
out_idx = num_out_sgpr;
}
assert(out_idx + param_size <= (is_sgpr ? num_out_sgpr : num_out));
if (param_size == 1)
arg = out[out_idx];
else
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index 06e773a77f1..3008c3ade14 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -16,21 +16,21 @@
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "si_shader_internal.h"
-#include "gallivm/lp_bld_intr.h"
+#include "ac_llvm_util.h"
static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
const struct tgsi_full_instruction *inst = emit_data->inst;
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMBuilderRef builder = ctx->ac.builder;
unsigned i;
LLVMValueRef conds[TGSI_NUM_CHANNELS];
@@ -442,23 +442,23 @@ static void emit_u2f(const struct lp_build_tgsi_action *action,
emit_data->args[0], ctx->f32, "");
}
static void
build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
emit_data->output[emit_data->chan] =
- lp_build_intrinsic(ctx->ac.builder, action->intr_name,
+ ac_build_intrinsic(&ctx->ac, action->intr_name,
emit_data->dst_type, emit_data->args,
- emit_data->arg_count, LP_FUNC_ATTR_READNONE);
+ emit_data->arg_count, AC_FUNC_ATTR_READNONE);
}
static void emit_bfi(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMBuilderRef builder = ctx->ac.builder;
LLVMValueRef bfi_args[3];
LLVMValueRef bfi_sm5;
@@ -683,24 +683,24 @@ static void dfracexp_fetch_args(struct lp_build_tgsi_context *bld_base,
emit_data->arg_count = 1;
}
static void dfracexp_emit(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
emit_data->output[emit_data->chan] =
- lp_build_intrinsic(ctx->ac.builder, "llvm.amdgcn.frexp.mant.f64",
+ ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.mant.f64",
ctx->ac.f64, &emit_data->args[0], 1, 0);
emit_data->output1[emit_data->chan] =
- lp_build_intrinsic(ctx->ac.builder, "llvm.amdgcn.frexp.exp.i32.f64",
+ ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.exp.i32.f64",
ctx->ac.i32, &emit_data->args[0], 1, 0);
}
void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
{
lp_set_default_actions(bld_base);
bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and;
bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl;
bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi;
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index a3091c09d69..c91bcc56971 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -18,21 +18,20 @@
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "si_shader_internal.h"
#include "si_pipe.h"
#include "sid.h"
-#include "gallivm/lp_bld_intr.h"
#include "tgsi/tgsi_build.h"
#include "tgsi/tgsi_util.h"
#include "ac_llvm_util.h"
static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data);
static const struct lp_build_tgsi_action tex_action;
@@ -702,22 +701,22 @@ static void store_emit_buffer(
offset = base_offset;
if (start != 0) {
offset = LLVMBuildAdd(
builder, offset,
LLVMConstInt(ctx->i32, start * 4, 0), "");
}
emit_data->args[0] = data;
emit_data->args[3] = offset;
- lp_build_intrinsic(
- builder, intrinsic_name, emit_data->dst_type,
+ ac_build_intrinsic(
+ &ctx->ac, intrinsic_name, emit_data->dst_type,
emit_data->args, emit_data->arg_count,
ac_get_store_intr_attribs(writeonly_memory));
}
}
static void store_emit_memory(
struct si_shader_context *ctx,
struct lp_build_emit_data *emit_data)
{
const struct tgsi_full_instruction *inst = emit_data->inst;
@@ -738,21 +737,20 @@ static void store_emit_memory(
LLVMBuildStore(builder, data, derived_ptr);
}
}
static void store_emit(
const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
- LLVMBuilderRef builder = ctx->ac.builder;
const struct tgsi_full_instruction * inst = emit_data->inst;
const struct tgsi_shader_info *info = &ctx->shader->selector->info;
unsigned target = inst->Memory.Texture;
bool writeonly_memory = false;
if (inst->Dst[0].Register.File == TGSI_FILE_MEMORY) {
store_emit_memory(ctx, emit_data);
return;
}
@@ -764,22 +762,22 @@ static void store_emit(
info->shader_buffers_atomic,
info->images_load |
info->images_atomic);
if (inst->Dst[0].Register.File == TGSI_FILE_BUFFER) {
store_emit_buffer(ctx, emit_data, writeonly_memory);
return;
}
if (target == TGSI_TEXTURE_BUFFER) {
- emit_data->output[emit_data->chan] = lp_build_intrinsic(
- builder, "llvm.amdgcn.buffer.store.format.v4f32",
+ emit_data->output[emit_data->chan] = ac_build_intrinsic(
+ &ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32",
emit_data->dst_type, emit_data->args,
emit_data->arg_count,
ac_get_store_intr_attribs(writeonly_memory));
} else {
struct ac_image_args args = {};
args.opcode = ac_image_store;
args.data[0] = emit_data->args[0];
args.resource = emit_data->args[1];
memcpy(args.coords, &emit_data->args[2], sizeof(args.coords));
args.dim = ac_image_dim_from_tgsi_target(ctx->screen, inst->Memory.Texture);
@@ -919,36 +917,35 @@ static void atomic_emit_memory(struct si_shader_context *ctx,
}
emit_data->output[emit_data->chan] = LLVMBuildBitCast(builder, result, emit_data->dst_type, "");
}
static void atomic_emit(
const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
- LLVMBuilderRef builder = ctx->ac.builder;
const struct tgsi_full_instruction * inst = emit_data->inst;
LLVMValueRef tmp;
if (inst->Src[0].Register.File == TGSI_FILE_MEMORY) {
atomic_emit_memory(ctx, emit_data);
return;
}
if (inst->Src[0].Register.File == TGSI_FILE_BUFFER ||
inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
char intrinsic_name[40];
snprintf(intrinsic_name, sizeof(intrinsic_name),
"llvm.amdgcn.buffer.atomic.%s", action->intr_name);
- tmp = lp_build_intrinsic(
- builder, intrinsic_name, ctx->i32,
+ tmp = ac_build_intrinsic(
+ &ctx->ac, intrinsic_name, ctx->i32,
emit_data->args, emit_data->arg_count, 0);
emit_data->output[emit_data->chan] = ac_to_float(&ctx->ac, tmp);
} else {
unsigned num_data = inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS ? 2 : 1;
struct ac_image_args args = {};
if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS) {
args.opcode = ac_image_atomic_cmpswap;
} else {
args.opcode = ac_image_atomic;
--
2.17.1
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