[Mesa-dev] [PATCH 4/6] i965/fs: Relax type matching rules in cmod propagation from MOV instructions

[Ian Romanick]

From: Ian Romanick <ian.d.romanick at intel.com>

To allow cmod propagation from a MOV in a sequence like:

    and(16)         g31<1>UD       g20<8,8,1>UD   g22<8,8,1>UD
    mov.nz.f0(16)   null<1>F       g31<8,8,1>D

A similar change to the vec4 backend had no effect.

The SIMD8 and SIMD16 shaders in two UE4 demos are helped.

All Gen7+ platforms had similar results. (Haswell shown)
total instructions in shared programs: 12973823 -> 12973791 (<.01%)
instructions in affected programs: 4487 -> 4455 (-0.71%)
helped: 20
HURT: 0
helped stats (abs) min: 1 max: 2 x̄: 1.60 x̃: 2
helped stats (rel) min: 0.30% max: 6.90% x̄: 1.57% x̃: 1.00%
95% mean confidence interval for instructions value: -1.84 -1.36
95% mean confidence interval for instructions %-change: -2.47% -0.68%
Instructions are helped.

total cycles in shared programs: 410348115 -> 410347641 (<.01%)
cycles in affected programs: 69104 -> 68630 (-0.69%)
helped: 16
HURT: 0
helped stats (abs) min: 6 max: 70 x̄: 29.62 x̃: 32
helped stats (rel) min: 0.15% max: 20.59% x̄: 2.99% x̃: 1.07%
95% mean confidence interval for cycles value: -38.61 -20.64
95% mean confidence interval for cycles %-change: -5.65% -0.34%
Cycles are helped.

Sandy Bridge
total instructions in shared programs: 10427842 -> 10427834 (<.01%)
instructions in affected programs: 2574 -> 2566 (-0.31%)
helped: 4
HURT: 0
helped stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2
helped stats (rel) min: 0.28% max: 0.34% x̄: 0.31% x̃: 0.31%
95% mean confidence interval for instructions value: -2.00 -2.00
95% mean confidence interval for instructions %-change: -0.37% -0.26%
Instructions are helped.

total cycles in shared programs: 146154861 -> 146154725 (<.01%)
cycles in affected programs: 116854 -> 116718 (-0.12%)
helped: 4
HURT: 0
helped stats (abs) min: 32 max: 36 x̄: 34.00 x̃: 34
helped stats (rel) min: 0.12% max: 0.12% x̄: 0.12% x̃: 0.12%
95% mean confidence interval for cycles value: -37.67 -30.33
95% mean confidence interval for cycles %-change: -0.12% -0.11%
Cycles are helped.

No changes on Iron Lake or GM45.

Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
---
 src/intel/compiler/brw_fs_cmod_propagation.cpp | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/src/intel/compiler/brw_fs_cmod_propagation.cpp b/src/intel/compiler/brw_fs_cmod_propagation.cpp
index 5b74f267359..17abcf05d8a 100644
--- a/src/intel/compiler/brw_fs_cmod_propagation.cpp
+++ b/src/intel/compiler/brw_fs_cmod_propagation.cpp
@@ -248,10 +248,25 @@ opt_cmod_propagation_local(const gen_device_info *devinfo, bblock_t *block)
                break;
 
             /* Comparisons operate differently for ints and floats */
-            if (scan_inst->dst.type != inst->dst.type &&
-                (scan_inst->dst.type == BRW_REGISTER_TYPE_F ||
-                 inst->dst.type == BRW_REGISTER_TYPE_F))
-               break;
+            if (scan_inst->dst.type != inst->dst.type) {
+               /* We should propagate from a MOV to another instruction in a
+                * sequence like:
+                *
+                *    and(16)         g31<1>UD       g20<8,8,1>UD   g22<8,8,1>UD
+                *    mov.nz.f0(16)   null<1>F       g31<8,8,1>D
+                */
+               if (inst->opcode == BRW_OPCODE_MOV) {
+                  if ((inst->src[0].type != BRW_REGISTER_TYPE_D &&
+                       inst->src[0].type != BRW_REGISTER_TYPE_UD) ||
+                      (scan_inst->dst.type != BRW_REGISTER_TYPE_D &&
+                       scan_inst->dst.type != BRW_REGISTER_TYPE_UD)) {
+                     break;
+                  }
+               } else if (scan_inst->dst.type == BRW_REGISTER_TYPE_F ||
+                          inst->dst.type == BRW_REGISTER_TYPE_F) {
+                  break;
+               }
+            }
 
             /* If the instruction generating inst's source also wrote the
              * flag, and inst is doing a simple .nz comparison, then inst
-- 
2.14.4