[Mesa-dev] [PATCH 50/53] intel/anv, blorp, i965: Implement the SKL 16x MSAA SIMD32 workaround

[Kenneth Graunke]

On Thursday, May 24, 2018 2:56:32 PM PDT Jason Ekstrand wrote:
> ---
>  src/intel/blorp/blorp_genX_exec.h             | 14 ++++++++++++++
>  src/intel/vulkan/genX_pipeline.c              | 20 ++++++++++++++++++--
>  src/mesa/drivers/dri/i965/genX_state_upload.c | 16 ++++++++++++++++
>  3 files changed, 48 insertions(+), 2 deletions(-)
> 
> diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
> index 9947ad3..93f1204 100644
> --- a/src/intel/blorp/blorp_genX_exec.h
> +++ b/src/intel/blorp/blorp_genX_exec.h
> @@ -763,6 +763,20 @@ blorp_emit_ps_config(struct blorp_batch *batch,
>           ps._16PixelDispatchEnable = prog_data->dispatch_16;
>           ps._32PixelDispatchEnable = prog_data->dispatch_32;
>  
> +         /* From the Sky Lake PRM 3DSTATE_PS::32 Pixel Dispatch Enable:
> +          *
> +          *    "When NUM_MULTISAMPLES = 16 or FORCE_SAMPLE_COUNT = 16, SIMD32
> +          *    Dispatch must not be enabled for PER_PIXEL dispatch mode."
> +          *
> +          * Since 16x MSAA is first introduced on SKL, we don't need to apply
> +          * the workaround on any older hardware.
> +          */
> +         if (GEN_GEN >= 9 && !prog_data->persample_dispatch &&
> +             params->num_samples == 16) {
> +            assert(ps._8PixelDispatchEnable || ps._16PixelDispatchEnable);
> +            ps._32PixelDispatchEnable = false;
> +         }
> +
>           ps.DispatchGRFStartRegisterForConstantSetupData0 =
>              brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 0);
>           ps.DispatchGRFStartRegisterForConstantSetupData1 =
> diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
> index 6bdda5d..97ccc08 100644
> --- a/src/intel/vulkan/genX_pipeline.c
> +++ b/src/intel/vulkan/genX_pipeline.c
> @@ -1445,7 +1445,8 @@ is_dual_src_blend_factor(VkBlendFactor factor)
>  
>  static void
>  emit_3dstate_ps(struct anv_pipeline *pipeline,
> -                const VkPipelineColorBlendStateCreateInfo *blend)
> +                const VkPipelineColorBlendStateCreateInfo *blend,
> +                const VkPipelineMultisampleStateCreateInfo *multisample)
>  {
>     MAYBE_UNUSED const struct gen_device_info *devinfo = &pipeline->device->info;
>     const struct anv_shader_bin *fs_bin =
> @@ -1492,6 +1493,20 @@ emit_3dstate_ps(struct anv_pipeline *pipeline,
>        ps._16PixelDispatchEnable     = wm_prog_data->dispatch_16;
>        ps._32PixelDispatchEnable     = wm_prog_data->dispatch_32;
>  
> +      /* From the Sky Lake PRM 3DSTATE_PS::32 Pixel Dispatch Enable:
> +       *
> +       *    "When NUM_MULTISAMPLES = 16 or FORCE_SAMPLE_COUNT = 16, SIMD32
> +       *    Dispatch must not be enabled for PER_PIXEL dispatch mode."
> +       *
> +       * Since 16x MSAA is first introduced on SKL, we don't need to apply
> +       * the workaround on any older hardware.
> +       */
> +      if (GEN_GEN >= 9 && !wm_prog_data->persample_dispatch &&
> +          multisample && multisample->rasterizationSamples == 16) {
> +         assert(ps._8PixelDispatchEnable || ps._16PixelDispatchEnable);
> +         ps._32PixelDispatchEnable = false;
> +      }
> +
>        ps.KernelStartPointer0 = fs_bin->kernel.offset +
>                                 brw_wm_prog_data_prog_offset(wm_prog_data, ps, 0);
>        ps.KernelStartPointer1 = fs_bin->kernel.offset +
> @@ -1732,7 +1747,8 @@ genX(graphics_pipeline_create)(
>     emit_3dstate_sbe(pipeline);
>     emit_3dstate_wm(pipeline, subpass, pCreateInfo->pColorBlendState,
>                     pCreateInfo->pMultisampleState);
> -   emit_3dstate_ps(pipeline, pCreateInfo->pColorBlendState);
> +   emit_3dstate_ps(pipeline, pCreateInfo->pColorBlendState,
> +                   pCreateInfo->pMultisampleState);
>  #if GEN_GEN >= 8
>     emit_3dstate_ps_extra(pipeline, subpass, pCreateInfo->pColorBlendState);
>     emit_3dstate_vf_topology(pipeline);
> diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
> index 0e56f92..df2259d 100644
> --- a/src/mesa/drivers/dri/i965/genX_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
> @@ -4032,6 +4032,22 @@ genX(upload_ps)(struct brw_context *brw)
>        ps._16PixelDispatchEnable = prog_data->dispatch_16;
>        ps._32PixelDispatchEnable = prog_data->dispatch_32;
>  
> +      /* From the Sky Lake PRM 3DSTATE_PS::32 Pixel Dispatch Enable:
> +       *
> +       *    "When NUM_MULTISAMPLES = 16 or FORCE_SAMPLE_COUNT = 16, SIMD32
> +       *    Dispatch must not be enabled for PER_PIXEL dispatch mode."
> +       *
> +       * Since 16x MSAA is first introduced on SKL, we don't need to apply
> +       * the workaround on any older hardware.
> +       *
> +       * _NEW_MULTISAMPLE

I don't think this is _NEW_MULTISAMPLE - that's for multisampling
related state knobs.  ctx->DrawBuffer is _NEW_BUFFERS, which isn't
flagged here, so this seems slightly off.

I think what you want instead is to use brw->num_samples instead of
_mesa_geometric_samples(ctx->DrawBuffer), and listen to
(GEN_GEN >= 9 ? BRW_NEW_NUM_SAMPLES : 0).

With that change,
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

> +       */
> +      if (GEN_GEN >= 9 && !prog_data->persample_dispatch &&
> +          _mesa_geometric_samples(ctx->DrawBuffer) == 16) {
> +         assert(ps._8PixelDispatchEnable || ps._16PixelDispatchEnable);
> +         ps._32PixelDispatchEnable = false;
> +      }
> +
>        ps.DispatchGRFStartRegisterForConstantSetupData0 =
>           brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 0);
>        ps.DispatchGRFStartRegisterForConstantSetupData1 =

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