[Mesa-dev] [PATCH 12/18] spirv/nir: add capability check for SpvCapabilityAtomicStorage

[Alejandro Piñeiro]

Capability that informs if atomic counters are supported. From SPIR-V
1.0 spec, section 3.7, "Storage Class", item 10 from table:

(Column "Storage Class"):

   "AtomicCounter For holding atomic counters. Visible across all
    functions of the current invocation. Atomic counter-specific
    memory."

(Column "Required Capability"):

   "AtomicStorage"
---
 src/compiler/shader_info.h        | 1 +
 src/compiler/spirv/spirv_to_nir.c | 5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
index 208235d8158..8c58ee285ec 100644
--- a/src/compiler/shader_info.h
+++ b/src/compiler/shader_info.h
@@ -57,6 +57,7 @@ struct spirv_supported_capabilities {
    bool descriptor_array_dynamic_indexing;
    bool runtime_descriptor_array;
    bool stencil_export;
+   bool atomic_storage;
 };
 
 typedef struct shader_info {
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index 270f263d047..9d2f57cef94 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -3389,7 +3389,6 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, SpvOp opcode,
       case SpvCapabilityFloat16Buffer:
       case SpvCapabilityFloat16:
       case SpvCapabilityInt64Atomics:
-      case SpvCapabilityAtomicStorage:
       case SpvCapabilityStorageImageMultisample:
       case SpvCapabilityInt8:
       case SpvCapabilitySparseResidency:
@@ -3399,6 +3398,10 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, SpvOp opcode,
                   spirv_capability_to_string(cap));
          break;
 
+      case SpvCapabilityAtomicStorage:
+         spv_check_supported(atomic_storage, cap);
+         break;
+
       case SpvCapabilityFloat64:
          spv_check_supported(float64, cap);
          break;
-- 
2.14.1