[Mesa-dev] [PATCH 45/56] spirv: Add subgroup quad support
Jason Ekstrand
jason at jlekstrand.net
Wed Mar 7 14:35:33 UTC 2018
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
---
src/compiler/shader_info.h | 1 +
src/compiler/spirv/spirv_to_nir.c | 3 +++
src/compiler/spirv/vtn_subgroup.c | 26 ++++++++++++++++++++++++--
3 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
index 9e5d7d9..140f661 100644
--- a/src/compiler/shader_info.h
+++ b/src/compiler/shader_info.h
@@ -46,6 +46,7 @@ struct spirv_supported_capabilities {
bool storage_16bit;
bool subgroup_ballot;
bool subgroup_basic;
+ bool subgroup_quad;
bool subgroup_shuffle;
bool subgroup_vote;
};
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index 1c3fd54..7019ab8 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -3310,6 +3310,9 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, SpvOp opcode,
spv_check_supported(subgroup_shuffle, cap);
break;
+ case SpvCapabilityGroupNonUniformQuad:
+ spv_check_supported(subgroup_quad, cap);
+
case SpvCapabilityVariablePointersStorageBuffer:
case SpvCapabilityVariablePointers:
spv_check_supported(variable_pointers, cap);
diff --git a/src/compiler/spirv/vtn_subgroup.c b/src/compiler/spirv/vtn_subgroup.c
index b999439..1204c59 100644
--- a/src/compiler/spirv/vtn_subgroup.c
+++ b/src/compiler/spirv/vtn_subgroup.c
@@ -252,6 +252,30 @@ vtn_handle_subgroup(struct vtn_builder *b, SpvOp opcode,
break;
}
+ case SpvOpGroupNonUniformQuadBroadcast:
+ vtn_build_subgroup_instr(b, nir_intrinsic_quad_broadcast,
+ val->ssa, vtn_ssa_value(b, w[4]),
+ vtn_ssa_value(b, w[5])->def);
+ break;
+
+ case SpvOpGroupNonUniformQuadSwap: {
+ unsigned direction = vtn_constant_value(b, w[5])->values[0].u32[0];
+ nir_intrinsic_op op;
+ switch (direction) {
+ case 0:
+ op = nir_intrinsic_quad_swap_horizontal;
+ break;
+ case 1:
+ op = nir_intrinsic_quad_swap_vertical;
+ break;
+ case 2:
+ op = nir_intrinsic_quad_swap_diagonal;
+ break;
+ }
+ vtn_build_subgroup_instr(b, op, val->ssa, vtn_ssa_value(b, w[4]), NULL);
+ break;
+ }
+
case SpvOpGroupNonUniformIAdd:
case SpvOpGroupNonUniformFAdd:
case SpvOpGroupNonUniformIMul:
@@ -268,8 +292,6 @@ vtn_handle_subgroup(struct vtn_builder *b, SpvOp opcode,
case SpvOpGroupNonUniformLogicalAnd:
case SpvOpGroupNonUniformLogicalOr:
case SpvOpGroupNonUniformLogicalXor:
- case SpvOpGroupNonUniformQuadBroadcast:
- case SpvOpGroupNonUniformQuadSwap:
default:
unreachable("Invalid SPIR-V opcode");
}
--
2.5.0.400.gff86faf
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