[Mesa-dev] [PATCH 2/5] radeonsi: expand constbuf 0 address correctly to fix Vega10 hangs

Christian König ckoenig.leichtzumerken at gmail.com
Thu Mar 8 09:29:52 UTC 2018


Am 07.03.2018 um 21:34 schrieb Marek Olšák:
> From: Marek Olšák <marek.olsak at amd.com>
>
> This is only required with the latest libdrm.
>
> This fixes 32-bit support with high addresses.
> (and possibly 64-bit support too because the high bits need to be masked out)

Acked-by: Christian König <christian.koenig at amd.com>

> ---
>   src/gallium/drivers/radeonsi/si_shader.c | 21 +++++++++++++++++----
>   1 file changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index 343a5d5..e2da765 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -2420,26 +2420,39 @@ static LLVMValueRef fetch_constant(
>   			addr = LLVMBuildLShr(ctx->ac.builder, addr, LLVMConstInt(ctx->i32, 2, 0), "");
>   			LLVMValueRef result = ac_build_load_invariant(&ctx->ac, ptr, addr);
>   			return bitcast(bld_base, type, result);
>   		}
>   
>   		/* Do the bounds checking with a descriptor, because
>   		 * doing computation and manual bounds checking of 64-bit
>   		 * addresses generates horrible VALU code with very high
>   		 * VGPR usage and very low SIMD occupancy.
>   		 */
> -		ptr = LLVMBuildPtrToInt(ctx->ac.builder, ptr, ctx->i64, "");
> -		ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->v2i32, "");
> +		ptr = LLVMBuildPtrToInt(ctx->ac.builder, ptr, ctx->ac.intptr, "");
> +
> +		LLVMValueRef desc0, desc1;
> +		if (HAVE_32BIT_POINTERS) {
> +			desc0 = ptr;
> +			desc1 = LLVMConstInt(ctx->i32,
> +					     S_008F04_BASE_ADDRESS_HI(ctx->screen->info.address32_hi), 0);
> +		} else {
> +			ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->v2i32, "");
> +			desc0 = LLVMBuildExtractElement(ctx->ac.builder, ptr, ctx->i32_0, "");
> +			desc1 = LLVMBuildExtractElement(ctx->ac.builder, ptr, ctx->i32_1, "");
> +			/* Mask out all bits except BASE_ADDRESS_HI. */
> +			desc1 = LLVMBuildAnd(ctx->ac.builder, desc1,
> +					     LLVMConstInt(ctx->i32, ~C_008F04_BASE_ADDRESS_HI, 0), "");
> +		}
>   
>   		LLVMValueRef desc_elems[] = {
> -			LLVMBuildExtractElement(ctx->ac.builder, ptr, ctx->i32_0, ""),
> -			LLVMBuildExtractElement(ctx->ac.builder, ptr, ctx->i32_1, ""),
> +			desc0,
> +			desc1,
>   			LLVMConstInt(ctx->i32, (sel->info.const_file_max[0] + 1) * 16, 0),
>   			LLVMConstInt(ctx->i32,
>   				S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
>   				S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
>   				S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
>   				S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
>   				S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
>   				S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32), 0)
>   		};
>   		LLVMValueRef desc = ac_build_gather_values(&ctx->ac, desc_elems, 4);



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