[Mesa-dev] [PATCH 0/7] radv: add support for the new subgroup capabilities

[Daniel Schürmann]

This patch series implements the following SPIR-V capabilities for RADV:
GroupNonUniform
GroupNonUniformVote
GroupNonUniformArithmetic
GroupNonUniformBallot
GroupNonUniformShuffle
GroupNonUniformShuffleRelative
GroupNonUniformQuad

Not yet supported is the GroupNonUniformClustered capability due to a bug in the LLVM WWM liveness analysis.

Except for GroupNonUniformArithmetic, the capabilities should also work on pre-VI chip class (untested).
To add support for GroupNonUniformArithmetic on pre-VI chip class, in/exclusive scan has to be implemented using the according instructions.

Daniel Schürmann (7):
  nir: adjust subgroups instructions for 64bit ballot sizes
  nir/spirv: propagate constants of GroupNonUniformQuad instructions and
    eliminate warning
  ac: lower 64bit subgroup intrinsics
  ac: make ballot and umsb capable of 64bit inputs
  ac: add LLVM build functions for subgroup instrinsics
  ac: handle subgroup intrinsics
  radv: enable subgroup capabilities

 src/amd/common/ac_llvm_build.c         | 508 ++++++++++++++++++++++++++++++++-
 src/amd/common/ac_llvm_build.h         |  33 ++-
 src/amd/common/ac_lower_subgroups.c    |  50 +++-
 src/amd/common/ac_nir_to_llvm.c        |  66 +++--
 src/amd/vulkan/radv_device.c           |  12 +-
 src/amd/vulkan/radv_shader.c           |   6 +-
 src/compiler/nir/nir_lower_subgroups.c |   5 +-
 src/compiler/nir/nir_opcodes.py        |  12 +-
 src/compiler/spirv/vtn_subgroup.c      |   8 +-
 9 files changed, 643 insertions(+), 57 deletions(-)

-- 
2.14.1