[Mesa-dev] [PATCH 2/4] spirv: add support for SPV_AMD_shader_trinary_minmax
Ilia Mirkin
imirkin at alum.mit.edu
Thu Mar 8 22:23:28 UTC 2018
On Thu, Mar 8, 2018 at 5:22 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote:
> On Thu, Mar 8, 2018 at 5:14 PM, Daniel Schürmann
> <daniel.schuermann at campus.tu-berlin.de> wrote:
>> From: Dave Airlie <airlied at redhat.com>
>>
>> Signed-off-by: Dave Airlie <airlied at redhat.com>
>> ---
>> src/compiler/shader_info.h | 1 +
>> src/compiler/spirv/spirv_to_nir.c | 3 +++
>> src/compiler/spirv/vtn_amd.c | 52 +++++++++++++++++++++++++++++++++++++++
>> src/compiler/spirv/vtn_private.h | 2 ++
>> 4 files changed, 58 insertions(+)
>>
>> diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
>> index b1e200070f..01a3060352 100644
>> --- a/src/compiler/shader_info.h
>> +++ b/src/compiler/shader_info.h
>> @@ -51,6 +51,7 @@ struct spirv_supported_capabilities {
>> bool subgroup_quad;
>> bool subgroup_shuffle;
>> bool subgroup_vote;
>> + bool AMD_shader_trinary_minmax;
Oh, and all the others are without the AMD/EXT/whatever prefix... not
sure what people want the convention to be. But so far it should just
be "shader_trinary_minmax".
>> };
>>
>> /* The supported extensions which add extended instructions */
>> diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
>> index 6a358c5973..ddd1b8fe79 100644
>> --- a/src/compiler/spirv/spirv_to_nir.c
>> +++ b/src/compiler/spirv/spirv_to_nir.c
>> @@ -376,6 +376,9 @@ vtn_handle_extension(struct vtn_builder *b, SpvOp opcode,
>> } else if ((strcmp((const char *)&w[2], "SPV_AMD_gcn_shader") == 0)
>> && (b->options && b->options->exts.AMD_gcn_shader)) {
>> val->ext_handler = vtn_handle_amd_gcn_shader_instruction;
>> + } else if ((strcmp((const char *)&w[2], "SPV_AMD_shader_trinary_minmax") == 0)
>> + && (b->options && b->options->caps.AMD_shader_trinary_minmax)) {
>> + val->ext_handler = vtn_handle_amd_shader_trinary_minmax_instruction;
>> } else {
>> vtn_fail("Unsupported extension");
>> }
>> diff --git a/src/compiler/spirv/vtn_amd.c b/src/compiler/spirv/vtn_amd.c
>> index b2b3e055f0..313e015f41 100644
>> --- a/src/compiler/spirv/vtn_amd.c
>> +++ b/src/compiler/spirv/vtn_amd.c
>> @@ -55,3 +55,55 @@ vtn_handle_amd_gcn_shader_instruction(struct vtn_builder *b, uint32_t ext_opcode
>> }
>> return true;
>> }
>> +
>> +bool
>> +vtn_handle_amd_shader_trinary_minmax_instruction(struct vtn_builder *b, uint32_t ext_opcode,
>> + const uint32_t *w, unsigned count)
>> +{
>> + struct nir_builder *nb = &b->nb;
>> + const struct glsl_type *dest_type =
>> + vtn_value(b, w[1], vtn_value_type_type)->type->type;
>> + struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
>> + val->ssa = vtn_create_ssa_value(b, dest_type);
>> +
>> + unsigned num_inputs = count - 5;
>> + assert(num_inputs == 3);
>> + nir_ssa_def *src[3] = { NULL, };
>> + for (unsigned i = 0; i < num_inputs; i++)
>
> indent
>
>> + src[i] = vtn_ssa_value(b, w[i + 5])->def;
>
> -ilia
More information about the mesa-dev
mailing list