[Mesa-dev] [PATCH 06/50] glsl: Add "built-in" functions to do lt(fp64, fp64)
Dave Airlie
airlied at gmail.com
Tue Mar 13 04:24:31 UTC 2018
From: Elie Tournier <tournier.elie at gmail.com>
Signed-off-by: Elie Tournier <elie.tournier at collabora.com>
---
src/compiler/glsl/builtin_float64.h | 135 ++++++++++++++++++++++++++++++++
src/compiler/glsl/builtin_functions.cpp | 4 +
src/compiler/glsl/builtin_functions.h | 3 +
src/compiler/glsl/float64.glsl | 42 ++++++++++
src/compiler/glsl/glcpp/glcpp-parse.y | 1 +
5 files changed, 185 insertions(+)
diff --git a/src/compiler/glsl/builtin_float64.h b/src/compiler/glsl/builtin_float64.h
index 6a8afea..f7e613f 100644
--- a/src/compiler/glsl/builtin_float64.h
+++ b/src/compiler/glsl/builtin_float64.h
@@ -218,3 +218,138 @@ extractFloat64Sign(void *mem_ctx, builtin_available_predicate avail)
sig->replace_parameters(&sig_parameters);
return sig;
}
+ir_function_signature *
+lt64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r004B = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r004B);
+ ir_variable *const r004C = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r004C);
+ ir_variable *const r004D = new(mem_ctx) ir_variable(glsl_type::uint_type, "b0", ir_var_function_in);
+ sig_parameters.push_tail(r004D);
+ ir_variable *const r004E = new(mem_ctx) ir_variable(glsl_type::uint_type, "b1", ir_var_function_in);
+ sig_parameters.push_tail(r004E);
+ ir_expression *const r004F = less(r004B, r004D);
+ ir_expression *const r0050 = equal(r004B, r004D);
+ ir_expression *const r0051 = less(r004C, r004E);
+ ir_expression *const r0052 = logic_and(r0050, r0051);
+ ir_expression *const r0053 = logic_or(r004F, r0052);
+ body.emit(ret(r0053));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+flt64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0054 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r0054);
+ ir_variable *const r0055 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
+ sig_parameters.push_tail(r0055);
+ ir_variable *const r0056 = body.make_temp(glsl_type::bool_type, "return_value");
+ ir_variable *const r0057 = new(mem_ctx) ir_variable(glsl_type::bool_type, "isbNaN", ir_var_auto);
+ body.emit(r0057);
+ ir_variable *const r0058 = new(mem_ctx) ir_variable(glsl_type::bool_type, "isaNaN", ir_var_auto);
+ body.emit(r0058);
+ ir_expression *const r0059 = rshift(swizzle_y(r0054), body.constant(int(20)));
+ ir_expression *const r005A = bit_and(r0059, body.constant(2047u));
+ ir_expression *const r005B = expr(ir_unop_u2i, r005A);
+ ir_expression *const r005C = equal(r005B, body.constant(int(2047)));
+ ir_expression *const r005D = bit_and(swizzle_y(r0054), body.constant(1048575u));
+ ir_expression *const r005E = bit_or(r005D, swizzle_x(r0054));
+ ir_expression *const r005F = nequal(r005E, body.constant(0u));
+ body.emit(assign(r0058, logic_and(r005C, r005F), 0x01));
+
+ ir_expression *const r0060 = rshift(swizzle_y(r0055), body.constant(int(20)));
+ ir_expression *const r0061 = bit_and(r0060, body.constant(2047u));
+ ir_expression *const r0062 = expr(ir_unop_u2i, r0061);
+ ir_expression *const r0063 = equal(r0062, body.constant(int(2047)));
+ ir_expression *const r0064 = bit_and(swizzle_y(r0055), body.constant(1048575u));
+ ir_expression *const r0065 = bit_or(r0064, swizzle_x(r0055));
+ ir_expression *const r0066 = nequal(r0065, body.constant(0u));
+ body.emit(assign(r0057, logic_and(r0063, r0066), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0068 = logic_or(r0058, r0057);
+ ir_if *f0067 = new(mem_ctx) ir_if(operand(r0068).val);
+ exec_list *const f0067_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0067->then_instructions;
+
+ body.emit(assign(r0056, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0067->else_instructions;
+
+ ir_variable *const r0069 = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r0069, rshift(swizzle_y(r0054), body.constant(int(31))), 0x01));
+
+ ir_variable *const r006A = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r006A, rshift(swizzle_y(r0055), body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r006C = nequal(r0069, r006A);
+ ir_if *f006B = new(mem_ctx) ir_if(operand(r006C).val);
+ exec_list *const f006B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f006B->then_instructions;
+
+ ir_expression *const r006D = nequal(r0069, body.constant(0u));
+ ir_expression *const r006E = bit_or(swizzle_y(r0054), swizzle_y(r0055));
+ ir_expression *const r006F = lshift(r006E, body.constant(int(1)));
+ ir_expression *const r0070 = bit_or(r006F, swizzle_x(r0054));
+ ir_expression *const r0071 = bit_or(r0070, swizzle_x(r0055));
+ ir_expression *const r0072 = nequal(r0071, body.constant(0u));
+ body.emit(assign(r0056, logic_and(r006D, r0072), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f006B->else_instructions;
+
+ ir_expression *const r0073 = nequal(r0069, body.constant(0u));
+ ir_expression *const r0074 = less(swizzle_y(r0055), swizzle_y(r0054));
+ ir_expression *const r0075 = equal(swizzle_y(r0055), swizzle_y(r0054));
+ ir_expression *const r0076 = less(swizzle_x(r0055), swizzle_x(r0054));
+ ir_expression *const r0077 = logic_and(r0075, r0076);
+ ir_expression *const r0078 = logic_or(r0074, r0077);
+ ir_expression *const r0079 = less(swizzle_y(r0054), swizzle_y(r0055));
+ ir_expression *const r007A = equal(swizzle_y(r0054), swizzle_y(r0055));
+ ir_expression *const r007B = less(swizzle_x(r0054), swizzle_x(r0055));
+ ir_expression *const r007C = logic_and(r007A, r007B);
+ ir_expression *const r007D = logic_or(r0079, r007C);
+ body.emit(assign(r0056, expr(ir_triop_csel, r0073, r0078, r007D), 0x01));
+
+
+ body.instructions = f006B_parent_instructions;
+ body.emit(f006B);
+
+ /* END IF */
+
+
+ body.instructions = f0067_parent_instructions;
+ body.emit(f0067);
+
+ /* END IF */
+
+ body.emit(ret(r0056));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
diff --git a/src/compiler/glsl/builtin_functions.cpp b/src/compiler/glsl/builtin_functions.cpp
index 2298c40..e9e1e13 100644
--- a/src/compiler/glsl/builtin_functions.cpp
+++ b/src/compiler/glsl/builtin_functions.cpp
@@ -3358,6 +3358,10 @@ builtin_builder::create_builtins()
generate_ir::feq64(mem_ctx, integer_functions_supported),
NULL);
+ add_function("__builtin_flt64",
+ generate_ir::flt64(mem_ctx, integer_functions_supported),
+ NULL);
+
#undef F
#undef FI
#undef FIUD_VEC
diff --git a/src/compiler/glsl/builtin_functions.h b/src/compiler/glsl/builtin_functions.h
index 8cfdf49..baadde7 100644
--- a/src/compiler/glsl/builtin_functions.h
+++ b/src/compiler/glsl/builtin_functions.h
@@ -79,6 +79,9 @@ fsign64(void *mem_ctx, builtin_available_predicate avail);
ir_function_signature *
feq64(void *mem_ctx, builtin_available_predicate avail);
+ir_function_signature *
+flt64(void *mem_ctx, builtin_available_predicate avail);
+
}
#endif /* BULITIN_FUNCTIONS_H */
diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl
index 6d939c2..fc0c94f 100644
--- a/src/compiler/glsl/float64.glsl
+++ b/src/compiler/glsl/float64.glsl
@@ -111,3 +111,45 @@ extractFloat64Sign(uvec2 a)
{
return (a.y>>31);
}
+
+/* Returns true if the 64-bit value formed by concatenating `a0' and `a1' is less
+ * than the 64-bit value formed by concatenating `b0' and `b1'. Otherwise,
+ * returns false.
+ */
+bool
+lt64(uint a0, uint a1, uint b0, uint b1)
+{
+ return (a0 < b0) || ((a0 == b0) && (a1 < b1));
+}
+
+/* Returns true if the double-precision floating-point value `a' is less than
+ * the corresponding value `b', and false otherwise. The comparison is performed
+ * according to the IEEE Standard for Floating-Point Arithmetic.
+ */
+bool
+flt64(uvec2 a, uvec2 b)
+{
+ uint aSign;
+ uint bSign;
+ bool isaNaN;
+ bool isbNaN;
+
+ uint aFracLo = extractFloat64FracLo(a);
+ uint aFracHi = extractFloat64FracHi(a);
+ uint bFracLo = extractFloat64FracLo(b);
+ uint bFracHi = extractFloat64FracHi(b);
+ isaNaN = (extractFloat64Exp(a) == 0x7FF) &&
+ ((aFracHi | aFracLo) != 0u);
+ isbNaN = (extractFloat64Exp(b) == 0x7FF) &&
+ ((bFracHi | bFracLo) != 0u);
+
+ if (isaNaN || isbNaN)
+ return false;
+
+ aSign = extractFloat64Sign(a);
+ bSign = extractFloat64Sign(b);
+ if (aSign != bSign)
+ return (aSign != 0u) && ((((a.y | b.y)<<1) | a.x | b.x) != 0u);
+
+ return mix(lt64(a.y, a.x, b.y, b.x), lt64(b.y, b.x, a.y, a.x), aSign != 0u);
+}
diff --git a/src/compiler/glsl/glcpp/glcpp-parse.y b/src/compiler/glsl/glcpp/glcpp-parse.y
index 9ffca67..da21cc2 100644
--- a/src/compiler/glsl/glcpp/glcpp-parse.y
+++ b/src/compiler/glsl/glcpp/glcpp-parse.y
@@ -2372,6 +2372,7 @@ _glcpp_parser_handle_version_declaration(glcpp_parser_t *parser, intmax_t versio
add_builtin_define(parser, "__have_builtin_builtin_fneg64", 1);
add_builtin_define(parser, "__have_builtin_builtin_fsign64", 1);
add_builtin_define(parser, "__have_builtin_builtin_feq64", 1);
+ add_builtin_define(parser, "__have_builtin_builtin_flt64", 1);
}
}
--
2.9.5
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