[Mesa-dev] [PATCH 32/50] glsl: Add a lowering pass for 64-bit float f2d()

[Dave Airlie]

From: Elie Tournier <tournier.elie at gmail.com>

Signed-off-by: Elie Tournier <elie.tournier at collabora.com>
---
 src/compiler/glsl/ir_optimization.h | 3 ++-
 src/compiler/glsl/lower_64bit.cpp   | 7 +++++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimization.h
index e7860ef..c649c80 100644
--- a/src/compiler/glsl/ir_optimization.h
+++ b/src/compiler/glsl/ir_optimization.h
@@ -70,10 +70,11 @@
 #define D2I                       (1U << 11)
 #define I2D                       (1U << 12)
 #define D2F                       (1U << 13)
+#define F2D                       (1U << 14)
 
 #define LOWER_ALL_DOUBLE_OPS (ABS64 | NEG64 | SIGN64 | EQ64 | LT64 | \
                               ADD64 | MUL64 | D2U | U2D | D2I | I2D | \
-                              D2F)
+                              D2F | F2D)
 
 /**
  * \see class lower_packing_builtins_visitor
diff --git a/src/compiler/glsl/lower_64bit.cpp b/src/compiler/glsl/lower_64bit.cpp
index e76ebdc..126c961 100644
--- a/src/compiler/glsl/lower_64bit.cpp
+++ b/src/compiler/glsl/lower_64bit.cpp
@@ -445,6 +445,13 @@ lower_64bit_visitor::handle_rvalue(ir_rvalue **rvalue)
       }
       break;
 
+   case ir_unop_f2d:
+      if (lowering(F2D)) {
+         if (ir->type->base_type == GLSL_TYPE_DOUBLE)
+            *rvalue = handle_op(ir, "__builtin_fp32_to_fp64", generate_ir::fp32_to_fp64, true);
+      }
+      break;
+
    case ir_unop_i2d:
       if (lowering(I2D)) {
          if (ir->type->base_type == GLSL_TYPE_DOUBLE)
-- 
2.9.5