[Mesa-dev] [PATCH] intel/tools: aubinator: Catch gen11 "enhanced execlist" submission

[Rafael Antognolli]

On Fri, Mar 09, 2018 at 04:29:41PM -0800, Scott D Phillips wrote:
> Different registers are used for execlist submission in gen11, so
> also watch those. This code only watches element zero of the
> submit queue, which is all aubdump currently writes.
> ---
>  src/intel/tools/aubinator.c | 26 ++++++++++++++++++++------
>  1 file changed, 20 insertions(+), 6 deletions(-)
> 
> diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
> index 77bad29051e..8029dc12155 100644
> --- a/src/intel/tools/aubinator.c
> +++ b/src/intel/tools/aubinator.c
> @@ -248,6 +248,9 @@ handle_memtrace_reg_write(uint32_t *p)
>     int engine;
>     static int render_elsp_writes = 0;
>     static int blitter_elsp_writes = 0;
> +   static int render_elsq0 = 0;
> +   static int blitter_elsq0 = 0;
> +   uint8_t *pphwsp;
>  
>     if (offset == 0x2230) {
>        render_elsp_writes++;
> @@ -255,18 +258,29 @@ handle_memtrace_reg_write(uint32_t *p)
>     } else if (offset == 0x22230) {
>        blitter_elsp_writes++;
>        engine = GEN_ENGINE_BLITTER;
> +   } else if (offset == 0x2510) {
> +      render_elsq0 = value;
> +   } else if (offset == 0x22510) {
> +      blitter_elsq0 = value;
> +   } else if (offset == 0x2550 || offset == 0x22550) {
> +      /* nothing */;
>     } else {
>        return;
>     }
>  
> -   if (render_elsp_writes > 3)
> -      render_elsp_writes = 0;
> -   else if (blitter_elsp_writes > 3)
> -      blitter_elsp_writes = 0;
> -   else
> +   if (render_elsp_writes > 3 || blitter_elsp_writes > 3) {
> +      render_elsp_writes = blitter_elsp_writes = 0;
> +      pphwsp = (uint8_t*)gtt + (value & 0xfffff000);
> +   } else if (offset == 0x2550) {
> +      engine = GEN_ENGINE_RENDER;
> +      pphwsp = (uint8_t*)gtt + (render_elsq0 & 0xfffff000);
> +   } else if (offset == 0x22550) {
> +      engine = GEN_ENGINE_BLITTER;
> +      pphwsp = (uint8_t*)gtt + (blitter_elsq0 & 0xfffff000);
> +   } else {
>        return;
> +   }

The above logic threw me off a little. If I understood correctly, if we
have enough elsp writes, then set hw status page offset and decode the
context (for gen <= 10). On the other hand, if we have elsq0 writes,
save the hw status page offset, and when we get the write to the control
register, decode the context.

It makes sense, but maybe in the future it might be better to split this
into two separate functions, one for elsp and another one for elsq.

Either way, for now this is:

Reviewed-by: Rafael Antognolli <rafael.antognolli at intel.com>

> -   uint8_t *pphwsp = (uint8_t*)gtt + (value & 0xfffff000);
>     const uint32_t pphwsp_size = 4096;
>     uint32_t *context = (uint32_t*)(pphwsp + pphwsp_size);
>     uint32_t ring_buffer_head = context[5];
> -- 
> 2.14.3
>