[Mesa-dev] [PATCH 2/2] ac/nir_to_llvm: add frexp support

[Timothy Arceri]

Fixes CTS tests:
KHR-GL40.gpu_shader_fp64.builtin.frexp_double
KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec2
KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec3
KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec4

And piglit test:
tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-frexp-dvec4.shader_test
---
 src/amd/common/ac_nir_to_llvm.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index a4a36c34ec..1fd2745201 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -728,6 +728,17 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
 		result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
 				       result);
 		break;
+	case nir_op_frexp_exp:
+		src[0] = ac_to_float(&ctx->ac, src[0]);
+		result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.exp.i32.f64",
+					    ctx->ac.i32, src, 1, 0);
+
+		break;
+	case nir_op_frexp_sig:
+		src[0] = ac_to_float(&ctx->ac, src[0]);
+		result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.mant.f64",
+					    ctx->ac.f64, src, 1, 0);
+		break;
 	case nir_op_fmax:
 		result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
 		                              ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
-- 
2.14.3