[Mesa-dev] [RFC v1 06/38] nir: Rename image intrinsics to image_var
Jason Ekstrand
jason at jlekstrand.net
Wed Mar 21 05:54:40 UTC 2018
Generated with
git grep -l nir_intrinsic_image | xargs \
sed -i 's/nir_intrinsic_image/nir_intrinsic_image_var/g'
and some manual fixing in nir_intrinsics.h
---
src/amd/common/ac_nir_to_llvm.c | 42 ++++++++---------
src/amd/vulkan/radv_meta_bufimage.c | 8 ++--
src/amd/vulkan/radv_meta_fast_clear.c | 2 +-
src/amd/vulkan/radv_meta_resolve_cs.c | 2 +-
src/amd/vulkan/radv_shader_info.c | 40 ++++++++--------
src/compiler/glsl/glsl_to_nir.cpp | 54 +++++++++++-----------
src/compiler/nir/nir_intrinsics.h | 24 +++++-----
src/compiler/nir/nir_lower_samplers_as_deref.c | 22 ++++-----
src/compiler/spirv/spirv_to_nir.c | 4 +-
.../drivers/freedreno/ir3/ir3_compiler_nir.c | 38 +++++++--------
src/gallium/drivers/freedreno/ir3/ir3_nir.c | 2 +-
src/gallium/drivers/radeonsi/si_shader_nir.c | 18 ++++----
src/intel/compiler/brw_fs_nir.cpp | 46 +++++++++---------
src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 24 +++++-----
src/intel/vulkan/anv_nir_lower_input_attachments.c | 2 +-
15 files changed, 164 insertions(+), 164 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index b0c0d76..938b215 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2235,35 +2235,35 @@ static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
bool is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
switch (instr->intrinsic) {
- case nir_intrinsic_image_atomic_add:
+ case nir_intrinsic_image_var_atomic_add:
atomic_name = "add";
break;
- case nir_intrinsic_image_atomic_min:
+ case nir_intrinsic_image_var_atomic_min:
atomic_name = is_unsigned ? "umin" : "smin";
break;
- case nir_intrinsic_image_atomic_max:
+ case nir_intrinsic_image_var_atomic_max:
atomic_name = is_unsigned ? "umax" : "smax";
break;
- case nir_intrinsic_image_atomic_and:
+ case nir_intrinsic_image_var_atomic_and:
atomic_name = "and";
break;
- case nir_intrinsic_image_atomic_or:
+ case nir_intrinsic_image_var_atomic_or:
atomic_name = "or";
break;
- case nir_intrinsic_image_atomic_xor:
+ case nir_intrinsic_image_var_atomic_xor:
atomic_name = "xor";
break;
- case nir_intrinsic_image_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_exchange:
atomic_name = "swap";
break;
- case nir_intrinsic_image_atomic_comp_swap:
+ case nir_intrinsic_image_var_atomic_comp_swap:
atomic_name = "cmpswap";
break;
default:
abort();
}
- if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap)
+ if (instr->intrinsic == nir_intrinsic_image_var_atomic_comp_swap)
params[param_count++] = get_src(ctx, instr->src[3]);
params[param_count++] = get_src(ctx, instr->src[2]);
@@ -2895,26 +2895,26 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
case nir_intrinsic_store_shared:
visit_store_shared(ctx, instr);
break;
- case nir_intrinsic_image_samples:
+ case nir_intrinsic_image_var_samples:
result = visit_image_samples(ctx, instr);
break;
- case nir_intrinsic_image_load:
+ case nir_intrinsic_image_var_load:
result = visit_image_load(ctx, instr);
break;
- case nir_intrinsic_image_store:
+ case nir_intrinsic_image_var_store:
visit_image_store(ctx, instr);
break;
- case nir_intrinsic_image_atomic_add:
- case nir_intrinsic_image_atomic_min:
- case nir_intrinsic_image_atomic_max:
- case nir_intrinsic_image_atomic_and:
- case nir_intrinsic_image_atomic_or:
- case nir_intrinsic_image_atomic_xor:
- case nir_intrinsic_image_atomic_exchange:
- case nir_intrinsic_image_atomic_comp_swap:
+ case nir_intrinsic_image_var_atomic_add:
+ case nir_intrinsic_image_var_atomic_min:
+ case nir_intrinsic_image_var_atomic_max:
+ case nir_intrinsic_image_var_atomic_and:
+ case nir_intrinsic_image_var_atomic_or:
+ case nir_intrinsic_image_var_atomic_xor:
+ case nir_intrinsic_image_var_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_comp_swap:
result = visit_image_atomic(ctx, instr);
break;
- case nir_intrinsic_image_size:
+ case nir_intrinsic_image_var_size:
result = visit_image_size(ctx, instr);
break;
case nir_intrinsic_shader_clock:
diff --git a/src/amd/vulkan/radv_meta_bufimage.c b/src/amd/vulkan/radv_meta_bufimage.c
index adf610a..69e15d3 100644
--- a/src/amd/vulkan/radv_meta_bufimage.c
+++ b/src/amd/vulkan/radv_meta_bufimage.c
@@ -113,7 +113,7 @@ build_nir_itob_compute_shader(struct radv_device *dev, bool is_3d)
nir_ssa_def *coord = nir_vec4(&b, tmp, tmp, tmp, tmp);
nir_ssa_def *outval = &tex->dest.ssa;
- nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
+ nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store);
store->src[0] = nir_src_for_ssa(coord);
store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
store->src[2] = nir_src_for_ssa(outval);
@@ -338,7 +338,7 @@ build_nir_btoi_compute_shader(struct radv_device *dev, bool is_3d)
nir_builder_instr_insert(&b, &tex->instr);
nir_ssa_def *outval = &tex->dest.ssa;
- nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
+ nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store);
store->src[0] = nir_src_for_ssa(img_coord);
store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
store->src[2] = nir_src_for_ssa(outval);
@@ -552,7 +552,7 @@ build_nir_itoi_compute_shader(struct radv_device *dev, bool is_3d)
nir_builder_instr_insert(&b, &tex->instr);
nir_ssa_def *outval = &tex->dest.ssa;
- nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
+ nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store);
store->src[0] = nir_src_for_ssa(dst_coord);
store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
store->src[2] = nir_src_for_ssa(outval);
@@ -748,7 +748,7 @@ build_nir_cleari_compute_shader(struct radv_device *dev, bool is_3d)
comps[3] = nir_imm_int(&b, 0);
global_id = nir_vec(&b, comps, 4);
- nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
+ nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store);
store->src[0] = nir_src_for_ssa(global_id);
store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
store->src[2] = nir_src_for_ssa(&clear_val->dest.ssa);
diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c
index fdeeaee..affecfa 100644
--- a/src/amd/vulkan/radv_meta_fast_clear.c
+++ b/src/amd/vulkan/radv_meta_fast_clear.c
@@ -90,7 +90,7 @@ build_dcc_decompress_compute_shader(struct radv_device *dev)
nir_builder_instr_insert(&b, &bar->instr);
nir_ssa_def *outval = &tex->dest.ssa;
- nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
+ nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store);
store->src[0] = nir_src_for_ssa(global_id);
store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
store->src[2] = nir_src_for_ssa(outval);
diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c
index 519e2a5..ca8f826 100644
--- a/src/amd/vulkan/radv_meta_resolve_cs.c
+++ b/src/amd/vulkan/radv_meta_resolve_cs.c
@@ -135,7 +135,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s
outval = radv_meta_build_resolve_srgb_conversion(&b, outval);
nir_ssa_def *coord = nir_iadd(&b, global_id, &dst_offset->dest.ssa);
- nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store);
+ nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store);
store->src[0] = nir_src_for_ssa(coord);
store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
store->src[2] = nir_src_for_ssa(outval);
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index ded3281..40a96d2 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -103,17 +103,17 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
case nir_intrinsic_vulkan_resource_index:
info->desc_set_used_mask |= (1 << nir_intrinsic_desc_set(instr));
break;
- case nir_intrinsic_image_load:
- case nir_intrinsic_image_store:
- case nir_intrinsic_image_atomic_add:
- case nir_intrinsic_image_atomic_min:
- case nir_intrinsic_image_atomic_max:
- case nir_intrinsic_image_atomic_and:
- case nir_intrinsic_image_atomic_or:
- case nir_intrinsic_image_atomic_xor:
- case nir_intrinsic_image_atomic_exchange:
- case nir_intrinsic_image_atomic_comp_swap:
- case nir_intrinsic_image_size: {
+ case nir_intrinsic_image_var_load:
+ case nir_intrinsic_image_var_store:
+ case nir_intrinsic_image_var_atomic_add:
+ case nir_intrinsic_image_var_atomic_min:
+ case nir_intrinsic_image_var_atomic_max:
+ case nir_intrinsic_image_var_atomic_and:
+ case nir_intrinsic_image_var_atomic_or:
+ case nir_intrinsic_image_var_atomic_xor:
+ case nir_intrinsic_image_var_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_comp_swap:
+ case nir_intrinsic_image_var_size: {
const struct glsl_type *type = instr->variables[0]->var->type;
if(instr->variables[0]->deref.child)
type = instr->variables[0]->deref.child->type;
@@ -124,15 +124,15 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
info->ps.uses_input_attachments = true;
mark_sampler_desc(instr->variables[0]->var, info);
- if (nir_intrinsic_image_store ||
- nir_intrinsic_image_atomic_add ||
- nir_intrinsic_image_atomic_min ||
- nir_intrinsic_image_atomic_max ||
- nir_intrinsic_image_atomic_and ||
- nir_intrinsic_image_atomic_or ||
- nir_intrinsic_image_atomic_xor ||
- nir_intrinsic_image_atomic_exchange ||
- nir_intrinsic_image_atomic_comp_swap) {
+ if (nir_intrinsic_image_var_store ||
+ nir_intrinsic_image_var_atomic_add ||
+ nir_intrinsic_image_var_atomic_min ||
+ nir_intrinsic_image_var_atomic_max ||
+ nir_intrinsic_image_var_atomic_and ||
+ nir_intrinsic_image_var_atomic_or ||
+ nir_intrinsic_image_var_atomic_xor ||
+ nir_intrinsic_image_var_atomic_exchange ||
+ nir_intrinsic_image_var_atomic_comp_swap) {
if (nir->info.stage == MESA_SHADER_FRAGMENT)
info->ps.writes_memory = true;
}
diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp
index 80eb15f..c2f7fd8 100644
--- a/src/compiler/glsl/glsl_to_nir.cpp
+++ b/src/compiler/glsl/glsl_to_nir.cpp
@@ -667,43 +667,43 @@ nir_visitor::visit(ir_call *ir)
op = nir_intrinsic_atomic_counter_comp_swap_var;
break;
case ir_intrinsic_image_load:
- op = nir_intrinsic_image_load;
+ op = nir_intrinsic_image_var_load;
break;
case ir_intrinsic_image_store:
- op = nir_intrinsic_image_store;
+ op = nir_intrinsic_image_var_store;
break;
case ir_intrinsic_image_atomic_add:
- op = nir_intrinsic_image_atomic_add;
+ op = nir_intrinsic_image_var_atomic_add;
break;
case ir_intrinsic_image_atomic_min:
- op = nir_intrinsic_image_atomic_min;
+ op = nir_intrinsic_image_var_atomic_min;
break;
case ir_intrinsic_image_atomic_max:
- op = nir_intrinsic_image_atomic_max;
+ op = nir_intrinsic_image_var_atomic_max;
break;
case ir_intrinsic_image_atomic_and:
- op = nir_intrinsic_image_atomic_and;
+ op = nir_intrinsic_image_var_atomic_and;
break;
case ir_intrinsic_image_atomic_or:
- op = nir_intrinsic_image_atomic_or;
+ op = nir_intrinsic_image_var_atomic_or;
break;
case ir_intrinsic_image_atomic_xor:
- op = nir_intrinsic_image_atomic_xor;
+ op = nir_intrinsic_image_var_atomic_xor;
break;
case ir_intrinsic_image_atomic_exchange:
- op = nir_intrinsic_image_atomic_exchange;
+ op = nir_intrinsic_image_var_atomic_exchange;
break;
case ir_intrinsic_image_atomic_comp_swap:
- op = nir_intrinsic_image_atomic_comp_swap;
+ op = nir_intrinsic_image_var_atomic_comp_swap;
break;
case ir_intrinsic_memory_barrier:
op = nir_intrinsic_memory_barrier;
break;
case ir_intrinsic_image_size:
- op = nir_intrinsic_image_size;
+ op = nir_intrinsic_image_var_size;
break;
case ir_intrinsic_image_samples:
- op = nir_intrinsic_image_samples;
+ op = nir_intrinsic_image_var_samples;
break;
case ir_intrinsic_ssbo_store:
op = nir_intrinsic_store_ssbo;
@@ -872,18 +872,18 @@ nir_visitor::visit(ir_call *ir)
nir_builder_instr_insert(&b, &instr->instr);
break;
}
- case nir_intrinsic_image_load:
- case nir_intrinsic_image_store:
- case nir_intrinsic_image_atomic_add:
- case nir_intrinsic_image_atomic_min:
- case nir_intrinsic_image_atomic_max:
- case nir_intrinsic_image_atomic_and:
- case nir_intrinsic_image_atomic_or:
- case nir_intrinsic_image_atomic_xor:
- case nir_intrinsic_image_atomic_exchange:
- case nir_intrinsic_image_atomic_comp_swap:
- case nir_intrinsic_image_samples:
- case nir_intrinsic_image_size: {
+ case nir_intrinsic_image_var_load:
+ case nir_intrinsic_image_var_store:
+ case nir_intrinsic_image_var_atomic_add:
+ case nir_intrinsic_image_var_atomic_min:
+ case nir_intrinsic_image_var_atomic_max:
+ case nir_intrinsic_image_var_atomic_and:
+ case nir_intrinsic_image_var_atomic_or:
+ case nir_intrinsic_image_var_atomic_xor:
+ case nir_intrinsic_image_var_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_comp_swap:
+ case nir_intrinsic_image_var_samples:
+ case nir_intrinsic_image_var_size: {
nir_ssa_undef_instr *instr_undef =
nir_ssa_undef_instr_create(shader, 1, 32);
nir_builder_instr_insert(&b, &instr_undef->instr);
@@ -900,14 +900,14 @@ nir_visitor::visit(ir_call *ir)
/* Set the intrinsic destination. */
if (ir->return_deref) {
unsigned num_components = ir->return_deref->type->vector_elements;
- if (instr->intrinsic == nir_intrinsic_image_size)
+ if (instr->intrinsic == nir_intrinsic_image_var_size)
instr->num_components = num_components;
nir_ssa_dest_init(&instr->instr, &instr->dest,
num_components, 32, NULL);
}
- if (op == nir_intrinsic_image_size ||
- op == nir_intrinsic_image_samples) {
+ if (op == nir_intrinsic_image_var_size ||
+ op == nir_intrinsic_image_var_samples) {
nir_builder_instr_insert(&b, &instr->instr);
break;
}
diff --git a/src/compiler/nir/nir_intrinsics.h b/src/compiler/nir/nir_intrinsics.h
index 7b73755..8f3d3bc 100644
--- a/src/compiler/nir/nir_intrinsics.h
+++ b/src/compiler/nir/nir_intrinsics.h
@@ -252,20 +252,20 @@ ATOMIC3(atomic_counter_comp_swap)
* either one or two additional scalar arguments with the same meaning as in
* the ARB_shader_image_load_store specification.
*/
-INTRINSIC(image_load, 2, ARR(4, 1), true, 4, 1, 0, xx, xx, xx,
+INTRINSIC(image_var_load, 2, ARR(4, 1), true, 4, 1, 0, xx, xx, xx,
NIR_INTRINSIC_CAN_ELIMINATE)
-INTRINSIC(image_store, 3, ARR(4, 1, 4), false, 0, 1, 0, xx, xx, xx, 0)
-INTRINSIC(image_atomic_add, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
-INTRINSIC(image_atomic_min, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
-INTRINSIC(image_atomic_max, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
-INTRINSIC(image_atomic_and, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
-INTRINSIC(image_atomic_or, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
-INTRINSIC(image_atomic_xor, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
-INTRINSIC(image_atomic_exchange, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
-INTRINSIC(image_atomic_comp_swap, 4, ARR(4, 1, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
-INTRINSIC(image_size, 0, ARR(0), true, 0, 1, 0, xx, xx, xx,
+INTRINSIC(image_var_store, 3, ARR(4, 1, 4), false, 0, 1, 0, xx, xx, xx, 0)
+INTRINSIC(image_var_atomic_add, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
+INTRINSIC(image_var_atomic_min, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
+INTRINSIC(image_var_atomic_max, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
+INTRINSIC(image_var_atomic_and, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
+INTRINSIC(image_var_atomic_or, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
+INTRINSIC(image_var_atomic_xor, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
+INTRINSIC(image_var_atomic_exchange, 3, ARR(4, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
+INTRINSIC(image_var_atomic_comp_swap, 4, ARR(4, 1, 1, 1), true, 1, 1, 0, xx, xx, xx, 0)
+INTRINSIC(image_var_size, 0, ARR(0), true, 0, 1, 0, xx, xx, xx,
NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
-INTRINSIC(image_samples, 0, ARR(0), true, 1, 1, 0, xx, xx, xx,
+INTRINSIC(image_var_samples, 0, ARR(0), true, 1, 1, 0, xx, xx, xx,
NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
/*
diff --git a/src/compiler/nir/nir_lower_samplers_as_deref.c b/src/compiler/nir/nir_lower_samplers_as_deref.c
index 3e819f7..b1272e2 100644
--- a/src/compiler/nir/nir_lower_samplers_as_deref.c
+++ b/src/compiler/nir/nir_lower_samplers_as_deref.c
@@ -183,17 +183,17 @@ lower_intrinsic(nir_intrinsic_instr *instr,
struct lower_samplers_as_deref_state *state,
nir_builder *b)
{
- if (instr->intrinsic == nir_intrinsic_image_load ||
- instr->intrinsic == nir_intrinsic_image_store ||
- instr->intrinsic == nir_intrinsic_image_atomic_add ||
- instr->intrinsic == nir_intrinsic_image_atomic_min ||
- instr->intrinsic == nir_intrinsic_image_atomic_max ||
- instr->intrinsic == nir_intrinsic_image_atomic_and ||
- instr->intrinsic == nir_intrinsic_image_atomic_or ||
- instr->intrinsic == nir_intrinsic_image_atomic_xor ||
- instr->intrinsic == nir_intrinsic_image_atomic_exchange ||
- instr->intrinsic == nir_intrinsic_image_atomic_comp_swap ||
- instr->intrinsic == nir_intrinsic_image_size) {
+ if (instr->intrinsic == nir_intrinsic_image_var_load ||
+ instr->intrinsic == nir_intrinsic_image_var_store ||
+ instr->intrinsic == nir_intrinsic_image_var_atomic_add ||
+ instr->intrinsic == nir_intrinsic_image_var_atomic_min ||
+ instr->intrinsic == nir_intrinsic_image_var_atomic_max ||
+ instr->intrinsic == nir_intrinsic_image_var_atomic_and ||
+ instr->intrinsic == nir_intrinsic_image_var_atomic_or ||
+ instr->intrinsic == nir_intrinsic_image_var_atomic_xor ||
+ instr->intrinsic == nir_intrinsic_image_var_atomic_exchange ||
+ instr->intrinsic == nir_intrinsic_image_var_atomic_comp_swap ||
+ instr->intrinsic == nir_intrinsic_image_var_size) {
b->cursor = nir_before_instr(&instr->instr);
lower_deref(instr->variables[0], state, b);
return true;
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index f06dca9..e91d1e3 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -2353,7 +2353,7 @@ vtn_handle_image(struct vtn_builder *b, SpvOp opcode,
nir_intrinsic_op op;
switch (opcode) {
-#define OP(S, N) case SpvOp##S: op = nir_intrinsic_image_##N; break;
+#define OP(S, N) case SpvOp##S: op = nir_intrinsic_image_var_##N; break;
OP(ImageQuerySize, size)
OP(ImageRead, load)
OP(ImageWrite, store)
@@ -2433,7 +2433,7 @@ vtn_handle_image(struct vtn_builder *b, SpvOp opcode,
unsigned dest_components =
nir_intrinsic_infos[intrin->intrinsic].dest_components;
- if (intrin->intrinsic == nir_intrinsic_image_size) {
+ if (intrin->intrinsic == nir_intrinsic_image_var_size) {
dest_components = intrin->num_components =
glsl_get_vector_elements(type->type);
}
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 1d6403b..a3e82ab 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -1826,28 +1826,28 @@ emit_intrinsic_atomic_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
src2 = get_image_offset(ctx, var, coords, false);
switch (intr->intrinsic) {
- case nir_intrinsic_image_atomic_add:
+ case nir_intrinsic_image_var_atomic_add:
atomic = ir3_ATOMIC_ADD_G(b, image, 0, src0, 0, src1, 0, src2, 0);
break;
- case nir_intrinsic_image_atomic_min:
+ case nir_intrinsic_image_var_atomic_min:
atomic = ir3_ATOMIC_MIN_G(b, image, 0, src0, 0, src1, 0, src2, 0);
break;
- case nir_intrinsic_image_atomic_max:
+ case nir_intrinsic_image_var_atomic_max:
atomic = ir3_ATOMIC_MAX_G(b, image, 0, src0, 0, src1, 0, src2, 0);
break;
- case nir_intrinsic_image_atomic_and:
+ case nir_intrinsic_image_var_atomic_and:
atomic = ir3_ATOMIC_AND_G(b, image, 0, src0, 0, src1, 0, src2, 0);
break;
- case nir_intrinsic_image_atomic_or:
+ case nir_intrinsic_image_var_atomic_or:
atomic = ir3_ATOMIC_OR_G(b, image, 0, src0, 0, src1, 0, src2, 0);
break;
- case nir_intrinsic_image_atomic_xor:
+ case nir_intrinsic_image_var_atomic_xor:
atomic = ir3_ATOMIC_XOR_G(b, image, 0, src0, 0, src1, 0, src2, 0);
break;
- case nir_intrinsic_image_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_exchange:
atomic = ir3_ATOMIC_XCHG_G(b, image, 0, src0, 0, src1, 0, src2, 0);
break;
- case nir_intrinsic_image_atomic_comp_swap:
+ case nir_intrinsic_image_var_atomic_comp_swap:
/* for cmpxchg, src0 is [ui]vec2(data, compare): */
src0 = create_collect(b, (struct ir3_instruction*[]){
src0,
@@ -2084,23 +2084,23 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
case nir_intrinsic_shared_atomic_comp_swap:
dst[0] = emit_intrinsic_atomic_shared(ctx, intr);
break;
- case nir_intrinsic_image_load:
+ case nir_intrinsic_image_var_load:
emit_intrinsic_load_image(ctx, intr, dst);
break;
- case nir_intrinsic_image_store:
+ case nir_intrinsic_image_var_store:
emit_intrinsic_store_image(ctx, intr);
break;
- case nir_intrinsic_image_size:
+ case nir_intrinsic_image_var_size:
emit_intrinsic_image_size(ctx, intr, dst);
break;
- case nir_intrinsic_image_atomic_add:
- case nir_intrinsic_image_atomic_min:
- case nir_intrinsic_image_atomic_max:
- case nir_intrinsic_image_atomic_and:
- case nir_intrinsic_image_atomic_or:
- case nir_intrinsic_image_atomic_xor:
- case nir_intrinsic_image_atomic_exchange:
- case nir_intrinsic_image_atomic_comp_swap:
+ case nir_intrinsic_image_var_atomic_add:
+ case nir_intrinsic_image_var_atomic_min:
+ case nir_intrinsic_image_var_atomic_max:
+ case nir_intrinsic_image_var_atomic_and:
+ case nir_intrinsic_image_var_atomic_or:
+ case nir_intrinsic_image_var_atomic_xor:
+ case nir_intrinsic_image_var_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_comp_swap:
dst[0] = emit_intrinsic_atomic_image(ctx, intr);
break;
case nir_intrinsic_barrier:
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_nir.c
index 0b637bb..cd1f9c5 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_nir.c
@@ -242,7 +242,7 @@ ir3_nir_scan_driver_consts(nir_shader *shader,
layout->ssbo_size.count;
layout->ssbo_size.count += 1; /* one const per */
break;
- case nir_intrinsic_image_store:
+ case nir_intrinsic_image_var_store:
idx = intr->variables[0]->var->data.driver_location;
if (layout->image_dims.mask & (1 << idx))
break;
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index acb796b..398a0df 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -126,15 +126,15 @@ static void scan_instruction(struct tgsi_shader_info *info,
case nir_intrinsic_load_tess_level_outer:
info->reads_tess_factors = true;
break;
- case nir_intrinsic_image_store:
- case nir_intrinsic_image_atomic_add:
- case nir_intrinsic_image_atomic_min:
- case nir_intrinsic_image_atomic_max:
- case nir_intrinsic_image_atomic_and:
- case nir_intrinsic_image_atomic_or:
- case nir_intrinsic_image_atomic_xor:
- case nir_intrinsic_image_atomic_exchange:
- case nir_intrinsic_image_atomic_comp_swap:
+ case nir_intrinsic_image_var_store:
+ case nir_intrinsic_image_var_atomic_add:
+ case nir_intrinsic_image_var_atomic_min:
+ case nir_intrinsic_image_var_atomic_max:
+ case nir_intrinsic_image_var_atomic_and:
+ case nir_intrinsic_image_var_atomic_or:
+ case nir_intrinsic_image_var_atomic_xor:
+ case nir_intrinsic_image_var_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_comp_swap:
case nir_intrinsic_store_ssbo:
case nir_intrinsic_ssbo_atomic_add:
case nir_intrinsic_ssbo_atomic_imin:
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index dbd2105..f5d5399 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1697,23 +1697,23 @@ static unsigned
get_image_atomic_op(nir_intrinsic_op op, const glsl_type *type)
{
switch (op) {
- case nir_intrinsic_image_atomic_add:
+ case nir_intrinsic_image_var_atomic_add:
return BRW_AOP_ADD;
- case nir_intrinsic_image_atomic_min:
+ case nir_intrinsic_image_var_atomic_min:
return (get_image_base_type(type) == BRW_REGISTER_TYPE_D ?
BRW_AOP_IMIN : BRW_AOP_UMIN);
- case nir_intrinsic_image_atomic_max:
+ case nir_intrinsic_image_var_atomic_max:
return (get_image_base_type(type) == BRW_REGISTER_TYPE_D ?
BRW_AOP_IMAX : BRW_AOP_UMAX);
- case nir_intrinsic_image_atomic_and:
+ case nir_intrinsic_image_var_atomic_and:
return BRW_AOP_AND;
- case nir_intrinsic_image_atomic_or:
+ case nir_intrinsic_image_var_atomic_or:
return BRW_AOP_OR;
- case nir_intrinsic_image_atomic_xor:
+ case nir_intrinsic_image_var_atomic_xor:
return BRW_AOP_XOR;
- case nir_intrinsic_image_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_exchange:
return BRW_AOP_MOV;
- case nir_intrinsic_image_atomic_comp_swap:
+ case nir_intrinsic_image_var_atomic_comp_swap:
return BRW_AOP_CMPWR;
default:
unreachable("Not reachable.");
@@ -3795,20 +3795,20 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
dest = get_nir_dest(instr->dest);
switch (instr->intrinsic) {
- case nir_intrinsic_image_load:
- case nir_intrinsic_image_store:
- case nir_intrinsic_image_atomic_add:
- case nir_intrinsic_image_atomic_min:
- case nir_intrinsic_image_atomic_max:
- case nir_intrinsic_image_atomic_and:
- case nir_intrinsic_image_atomic_or:
- case nir_intrinsic_image_atomic_xor:
- case nir_intrinsic_image_atomic_exchange:
- case nir_intrinsic_image_atomic_comp_swap: {
+ case nir_intrinsic_image_var_load:
+ case nir_intrinsic_image_var_store:
+ case nir_intrinsic_image_var_atomic_add:
+ case nir_intrinsic_image_var_atomic_min:
+ case nir_intrinsic_image_var_atomic_max:
+ case nir_intrinsic_image_var_atomic_and:
+ case nir_intrinsic_image_var_atomic_or:
+ case nir_intrinsic_image_var_atomic_xor:
+ case nir_intrinsic_image_var_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_comp_swap: {
using namespace image_access;
if (stage == MESA_SHADER_FRAGMENT &&
- instr->intrinsic != nir_intrinsic_image_load)
+ instr->intrinsic != nir_intrinsic_image_var_load)
brw_wm_prog_data(prog_data)->has_side_effects = true;
/* Get the referenced image variable and type. */
@@ -3835,10 +3835,10 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
fs_reg tmp;
/* Emit an image load, store or atomic op. */
- if (instr->intrinsic == nir_intrinsic_image_load)
+ if (instr->intrinsic == nir_intrinsic_image_var_load)
tmp = emit_image_load(bld, image, addr, surf_dims, arr_dims, format);
- else if (instr->intrinsic == nir_intrinsic_image_store)
+ else if (instr->intrinsic == nir_intrinsic_image_var_store)
emit_image_store(bld, image, addr, src0, surf_dims, arr_dims,
var->data.image.write_only ? GL_NONE : format);
@@ -3897,7 +3897,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
break;
}
- case nir_intrinsic_image_size: {
+ case nir_intrinsic_image_var_size: {
/* Get the referenced image variable and type. */
const nir_variable *var = instr->variables[0]->var;
const glsl_type *type = var->type->without_array();
@@ -3941,7 +3941,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
break;
}
- case nir_intrinsic_image_samples:
+ case nir_intrinsic_image_var_samples:
/* The driver does not support multi-sampled images. */
bld.MOV(retype(dest, BRW_REGISTER_TYPE_D), brw_imm_d(1));
break;
diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index acabc54..d5a08f7 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -67,18 +67,18 @@ get_used_bindings_block(nir_block *block,
nir_intrinsic_binding(intrin));
break;
- case nir_intrinsic_image_load:
- case nir_intrinsic_image_store:
- case nir_intrinsic_image_atomic_add:
- case nir_intrinsic_image_atomic_min:
- case nir_intrinsic_image_atomic_max:
- case nir_intrinsic_image_atomic_and:
- case nir_intrinsic_image_atomic_or:
- case nir_intrinsic_image_atomic_xor:
- case nir_intrinsic_image_atomic_exchange:
- case nir_intrinsic_image_atomic_comp_swap:
- case nir_intrinsic_image_size:
- case nir_intrinsic_image_samples:
+ case nir_intrinsic_image_var_load:
+ case nir_intrinsic_image_var_store:
+ case nir_intrinsic_image_var_atomic_add:
+ case nir_intrinsic_image_var_atomic_min:
+ case nir_intrinsic_image_var_atomic_max:
+ case nir_intrinsic_image_var_atomic_and:
+ case nir_intrinsic_image_var_atomic_or:
+ case nir_intrinsic_image_var_atomic_xor:
+ case nir_intrinsic_image_var_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_comp_swap:
+ case nir_intrinsic_image_var_size:
+ case nir_intrinsic_image_var_samples:
add_var_binding(state, intrin->variables[0]->var);
break;
diff --git a/src/intel/vulkan/anv_nir_lower_input_attachments.c b/src/intel/vulkan/anv_nir_lower_input_attachments.c
index 58b9b34..6dc4f90 100644
--- a/src/intel/vulkan/anv_nir_lower_input_attachments.c
+++ b/src/intel/vulkan/anv_nir_lower_input_attachments.c
@@ -127,7 +127,7 @@ anv_nir_lower_input_attachments(nir_shader *shader)
nir_intrinsic_instr *load = nir_instr_as_intrinsic(instr);
- if (load->intrinsic != nir_intrinsic_image_load)
+ if (load->intrinsic != nir_intrinsic_image_var_load)
continue;
try_lower_input_load(function->impl, load);
--
2.5.0.400.gff86faf
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