[Mesa-dev] [PATCH 1/2] spirv: Add a 64-bit implementation of OpIsInf

[Jason Ekstrand]

On Wed, Mar 21, 2018 at 8:18 AM, Jason Ekstrand <jason at jlekstrand.net>
wrote:

> Let's handle 16-bit while we're at it.
>

In particular, why not just create a nir_imm_floatN_t helper similar to the
nir_imm_intN_t helper I added not too long ago.  It would take a double and
automatically convert to float or float16 (via _mesa_half_to_float) as
needed.  Then a bunch of these things would just involve calling that
helper and you get all three for free.

--Jason


> On Thu, Mar 8, 2018 at 8:07 AM, Neil Roberts <nroberts at igalia.com> wrote:
>
>> The only change neccessary is to change the type of the constant used
>> to compare against.
>>
>> This has been tested against the arb_gpu_shader_fp64/execution/
>> fs-isinf-dvec tests using the ARB_gl_spirv branch.
>> ---
>>  src/compiler/spirv/vtn_alu.c | 11 ++++++++---
>>  1 file changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
>> index d0c9e316935..2b03a2e4d09 100644
>> --- a/src/compiler/spirv/vtn_alu.c
>> +++ b/src/compiler/spirv/vtn_alu.c
>> @@ -529,10 +529,15 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
>>        val->ssa->def = nir_fne(&b->nb, src[0], src[0]);
>>        break;
>>
>> -   case SpvOpIsInf:
>> -      val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]),
>> -                                      nir_imm_float(&b->nb, INFINITY));
>> +   case SpvOpIsInf: {
>> +      nir_ssa_def *inf;
>> +      if (src[0]->bit_size == 64)
>> +         inf = nir_imm_double(&b->nb, INFINITY);
>> +      else
>> +         inf = nir_imm_float(&b->nb, INFINITY);
>> +      val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]), inf);
>>        break;
>> +   }
>>
>>     case SpvOpFUnordEqual:
>>     case SpvOpFUnordNotEqual:
>> --
>> 2.14.3
>>
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>>
>
>
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