[Mesa-dev] [PATCH 05/11] intel/compiler: Use null destination register for memory fence messages

Francisco Jerez currojerez at riseup.net
Wed Mar 21 22:08:59 UTC 2018


Matt Turner <mattst88 at gmail.com> writes:

> On Wed, Mar 21, 2018 at 2:56 PM, Francisco Jerez <currojerez at riseup.net> wrote:
>> Matt Turner <mattst88 at gmail.com> writes:
>>
>>> From Message Descriptor section in gfxspecs:
>>>
>>>   "Memory fence messages without Commit Enable set do not return
>>>    anything to the thread (response length is 0 and destination
>>>    register is null)."
>>>
>>> This fixes a GPU hang in simulation in the piglit test
>>> arb_shader_image_load_store-shader-mem-barrier
>>>
>>
>> On what platform?
>
> I'm pretty sure Anuj found this in ICL. I'll revert this patch from my
> branch and try to confirm.

That sounds pretty bogus, this patch cannot possibly have any effect on
ICL because brw_memory_fence() is already setting commit_enable
unconditionally on Gen10+, so the destination register won't ever be
null regardless.
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