[Mesa-dev] [PATCH 3/4] radeonsi: don't use the SPI barrier management bug workaround

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_shader.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 8ae742c93f6..00ebbb9b0f2 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -7964,20 +7964,25 @@ static bool si_shader_select_ps_parts(struct si_screen *sscreen,
 	if (!shader->key.part.ps.epilog.poly_line_smoothing &&
 	    !shader->selector->info.reads_samplemask)
 		shader->config.spi_ps_input_ena &= C_0286CC_SAMPLE_COVERAGE_ENA;
 
 	return true;
 }
 
 void si_multiwave_lds_size_workaround(struct si_screen *sscreen,
 				      unsigned *lds_size)
 {
+	/* If tessellation is all offchip and on-chip GS isn't used, this
+	 * workaround is not needed.
+	 */
+	return;
+
 	/* SPI barrier management bug:
 	 *   Make sure we have at least 4k of LDS in use to avoid the bug.
 	 *   It applies to workgroup sizes of more than one wavefront.
 	 */
 	if (sscreen->info.family == CHIP_BONAIRE ||
 	    sscreen->info.family == CHIP_KABINI ||
 	    sscreen->info.family == CHIP_MULLINS)
 		*lds_size = MAX2(*lds_size, 8);
 }
 
-- 
2.15.1