[Mesa-dev] [PATCH 4/9] radeonsi: use better sample locations for 8x EQAA

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

Verified with the piglit MSAA accuracy test.
---
 src/gallium/drivers/radeonsi/si_state_msaa.c | 32 +++++++-------------
 1 file changed, 11 insertions(+), 21 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_msaa.c b/src/gallium/drivers/radeonsi/si_state_msaa.c
index 5066c31319e..afc98c1465a 100644
--- a/src/gallium/drivers/radeonsi/si_state_msaa.c
+++ b/src/gallium/drivers/radeonsi/si_state_msaa.c
@@ -85,63 +85,53 @@
 /* 1x MSAA */
 static const uint32_t sample_locs_1x =
 	FILL_SREG( 0, 0,   0, 0,   0, 0,   0, 0); /* S1, S2, S3 fields are not used by 1x */
 static const uint64_t centroid_priority_1x = 0x0000000000000000ull;
 
 /* 2x MSAA */
 static const uint32_t sample_locs_2x =
 	FILL_SREG(-4,-4,   4, 4,   0, 0,   0, 0); /* S2 & S3 fields are not used by 2x MSAA */
 static const uint64_t centroid_priority_2x = 0x1010101010101010ull;
 
-/* 8x MSAA */
-static const uint32_t sample_locs_8x[] = {
-	FILL_SREG(-3,-5,   5, 1,  -5, 5,   7,-7),
-	FILL_SREG(-7,-1,   3, 7,  -1, 3,   1,-3),
-	FILL_SREG( 0, 0,   0, 0,   0, 0,   0, 0), /* S8, S9 etc. are not used by 8x */
-	FILL_SREG( 0, 0,   0, 0,   0, 0,   0, 0),
-};
-static const uint64_t centroid_priority_8x = 0x3542017635420176ull;
-
-/* 4x and 16x MSAA
- * (the first 4 locations happen to be optimal for 4x MSAA, better than
- *  the standard DX 4x locations)
+/* 4x, 8x, and 16x MSAA
+ * - The first 4 locations happen to be optimal for 4x MSAA, better than
+ *   the standard DX 4x locations.
+ * - The first 8 locations happen to be almost as good as 8x DX locations,
+ *   but the DX locations are horrible for worst-case EQAA 8s4f and 8s2f.
  */
-static const uint32_t sample_locs_4x_16x[] = {
+static const uint32_t sample_locs_4x_8x_16x[] = {
 	FILL_SREG(-5,-2,   5, 3,  -2, 6,   3,-5),
 	FILL_SREG(-6,-7,   1, 1,  -6, 4,   7,-3),
 	FILL_SREG(-1,-3,   6, 7,  -3, 2,   0,-7),
 	FILL_SREG(-4,-6,   2, 5,  -8, 0,   4,-1),
 };
 static const uint64_t centroid_priority_4x = 0x2310231023102310ull;
+static const uint64_t centroid_priority_8x = 0x4762310547623105ull;
 static const uint64_t centroid_priority_16x = 0x49e7c6b231d0fa85ull;
 
 static void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
 				   unsigned sample_index, float *out_value)
 {
 	const uint32_t *sample_locs;
 
 	switch (sample_count) {
 	case 1:
 	default:
 		sample_locs = &sample_locs_1x;
 		break;
 	case 2:
 		sample_locs = &sample_locs_2x;
 		break;
 	case 4:
-		sample_locs = sample_locs_4x_16x;
-		break;
 	case 8:
-		sample_locs = sample_locs_8x;
-		break;
 	case 16:
-		sample_locs = sample_locs_4x_16x;
+		sample_locs = sample_locs_4x_8x_16x;
 		break;
 	}
 
 	out_value[0] = (GET_SX(sample_locs, sample_index) + 8) / 16.0f;
 	out_value[1] = (GET_SY(sample_locs, sample_index) + 8) / 16.0f;
 }
 
 static void si_emit_max_4_sample_locs(struct radeon_winsys_cs *cs,
 				      uint64_t centroid_priority,
 				      uint32_t sample_locs)
@@ -175,27 +165,27 @@ void si_emit_sample_locations(struct radeon_winsys_cs *cs, int nr_samples)
 {
 	switch (nr_samples) {
 	default:
 	case 1:
 		si_emit_max_4_sample_locs(cs, centroid_priority_1x, sample_locs_1x);
 		break;
 	case 2:
 		si_emit_max_4_sample_locs(cs, centroid_priority_2x, sample_locs_2x);
 		break;
 	case 4:
-		si_emit_max_4_sample_locs(cs, centroid_priority_4x, sample_locs_4x_16x[0]);
+		si_emit_max_4_sample_locs(cs, centroid_priority_4x, sample_locs_4x_8x_16x[0]);
 		break;
 	case 8:
-		si_emit_max_16_sample_locs(cs, centroid_priority_8x, sample_locs_8x, 8);
+		si_emit_max_16_sample_locs(cs, centroid_priority_8x, sample_locs_4x_8x_16x, 8);
 		break;
 	case 16:
-		si_emit_max_16_sample_locs(cs, centroid_priority_16x, sample_locs_4x_16x, 16);
+		si_emit_max_16_sample_locs(cs, centroid_priority_16x, sample_locs_4x_8x_16x, 16);
 		break;
 	}
 }
 
 void si_init_msaa_functions(struct si_context *sctx)
 {
 	int i;
 
 	sctx->b.get_sample_position = si_get_sample_position;
 
-- 
2.17.0